Questions about STA311B

[Smith.David]

Posted on December 02, 2016 at 11:57

Hi,

Some quick questions about the STA311B.

How does the quality of the clock at XTI affect the FFX output and ultimately performance of the system?

Do you have any reference design, figures or charts showing potential benefits of power supply error correction with a ADC.

Is the IC programable with a FD2233D and APWorkBench?

Many thanks!

#sta311b

[Nickname1623_O]

Posted on December 06, 2016 at 10:41

hi David ,

the jitter from clock will degrade SNR performance , it's better to use low jitter system clock.

regarding the power supply error correction feature , you need to contact with your local ST/distributor office for more detail .it's programmable through APWLink board and APWorkbench GUI , but you need to use dedicated hardware configuration (to provide power supply ripple sampling and feedback to STA311B) too.

thanks

YT

[Smith.David]

Posted on December 06, 2016 at 16:12

Thanks YT.

I can't seem to find any information about delay per channel.  Is there any settings / registers for this?

For example 1ms delay on channel 1, 6ms delay on channel 2 etc.