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GGarb.1
Associate
October 25, 2021
Solved

What is the typical input capacitance for STM6524 SR0 and SR1 inputs?

  • October 25, 2021
  • 3 replies
  • 1019 views

I have my I2C bus connected to an STM6524, and I see that my rising edges are slowed down a bit more than expected. What is the input capacitance of these inputs? Thank you!

    This topic has been closed for replies.
    Best answer by Peter BENSCH

    Since the device is not a classic logic gate structure and the digital functions on SR0/1 are designed to query the buttons, the internal structure is not part of the datasheet. Please open a personal ticket at OLS, if you need more information, maybe the colleagues are able to help.

    Good luck!

    If the problem is resolved here, please mark this topic as answered by selecting Select as best. This will help other users find that answer faster.

    /Peter

    3 replies

    Peter BENSCH
    Technical Moderator
    October 26, 2021

    Welcome, @GGarb.1​, to the community!

    Are you sure you connected I2C to an STM6524?

    The STM6524 is a Smart Reset device, in which SR0 and SR1 are pulled to low via pushbuttons in order to trigger a reset.

    Regards

    /Peter

    GGarb.1
    GGarb.1Author
    Associate
    November 4, 2021

    Yes, of course, I am sure. The device is used to provide a HW reset to a non-responsive I2C device.

    Peter BENSCH
    Technical Moderator
    November 5, 2021

    Thanks, it's more understandable now. You want to trigger a reset with the device if the I2C lines get stuck, i.e. both inputs are active (low) for at least the time tsrc (4...10s depending on type).

    Unfortunately, however, no values for the input capacitance are given in the data sheet, because this device was developed for push buttons, where this does not matter. If we cannot find a solution here, you can open a personal ticket at OLS with your login.

    Regards

    /Peter

    GGarb.1
    GGarb.1Author
    Associate
    November 5, 2021

    I see. It had not occurred to me that the fact these are push-button inputs there would be a difference in the input I/O structure from a typical digital CMOS input. Can you explain to me how the functionality of push-button inputs differ from typical CMOS inputs? The only things I can think of might be higher ESD tolerance (does not look like it), debouncing (not sure it's needed if the minimum reset set-up delay is 4 seconds), or internal pull (not there).

    Thank you!

    Glenn

    Peter BENSCH
    Peter BENSCHBest answer
    Technical Moderator
    November 8, 2021

    Since the device is not a classic logic gate structure and the digital functions on SR0/1 are designed to query the buttons, the internal structure is not part of the datasheet. Please open a personal ticket at OLS, if you need more information, maybe the colleagues are able to help.

    Good luck!

    If the problem is resolved here, please mark this topic as answered by selecting Select as best. This will help other users find that answer faster.

    /Peter