ECC for Flash and RAM configuration Issues

[Santhamurthy R]

Posted on April 17, 2017 at 14:12

Hello All,

I am using SPC560B54L5 board along with SPC studio V5.2.1.

   I want to enable ECC for RAM and Flash memory area for checking the memory corruption. I enabled the corresponding bits for 1-bit and 2-bit ECC in ECR register but I am unable to enable the corresponding interrupt callback function. I referred  to the SPC560Bxx_RLA Test application, and '@How to Find the memory(FLASH) corruption issues in SPC MCUs?'.(from community).   But I am unable to call the corresponding interrupt callbacks.

   Kindly guide me in enabling the ECC interrupts for Flash and RAM. Please share the example test application for enabling ECC for flash and RAM memory.

Thanks in Advance,

Regards,

R.Santhamurthy

#spc5 #spc5studio

[Erwan YVIN]

Posted on April 25, 2017 at 17:22

Hello ,

we have not some examples applications on ECC.

we have a change request to integrate ECC test example on the application wizard

you can go to the ECSM chapter (chapter 36)

i think that you should use vetcor35,vector36

After configuring your ECSM and enable the interrupts,

you can use 

ECC Error Generation Register (EEGR)

The ECC Error Generation Register is a 16-bit control register used to force the generation

of single- and double-bit data inversions in the memories with ECC, most notably the SRAM.

This capability is provided for two purposes:

? It provides a software-controlled mechanism for ?injecting? errors into the memories

during data writes to verify the integrity of the ECC logic.

? It provides a mechanism to allow testing of the software service routines associated

with memory error logging.

             Best regards

                          Erwan