eQADC Conversion Speed (SPC563M)

[Marco Perciavalle]

Posted on April 18, 2017 at 19:53

Hi,

in table 298 of SPC563Mx manual are listed conversion speed values given by the formula (see the attachment). The parameters are related to 120 MHz system clock but the mcu can provide 80 MHz clock at maximum. 

I tried to acquire a sine waveform (single-ended mode) generated at 2400 Hz and i set Sampling Cycle to 2 and clock divider to 8. I expected to see 4 periods for 1024 samples but it was acquired only 3 periods (3 and a half at maximum).

What does it mean? Am I wrong in conversion speed calculation? 

P.S.: For single-ended NumberOfADConversionCycles is 14

thank you so much. boaser

#spc563m #spc5-studio #adc #eqadc

[Marco Perciavalle]

Posted on April 24, 2017 at 15:38

Is there anybody can help me?

[Erwan YVIN]

Posted on April 25, 2017 at 11:36

Hello Marco ,

The formula seems to be correct :

ADCConversionSpeed = ADCClockFrequency(MHz) / (NumberOfSamplingCycles + NumberOfADConversionCycles)

625 Ksps = 10 MHz / (2 + 14)

we should have 260 samples by period (2400 Hz)

==> for 1024 samples, ~3,93 periods

i am checking with experts, maybe there is a configuration in eQADC.

   Best regards

                  Erwan

[Erwan YVIN]

Posted on April 25, 2017 at 17:57

Hello Marco ,

Do you use Internal channel or external channel ?

if external , could you try to use Internal channel.

              Best regards

                            Erwan