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Barna Faragó
Barna Faragó
Associate
October 21, 2017
Question

MPU variants

  • October 21, 2017
  • 1 reply
  • 1004 views
Posted on October 22, 2017 at 00:36

Hi,

in the en.DM00293238.pdf document, CMPU and SMPU are shown for spc58ec80. Other documents relating to the e200z4d mentioned only MMU in core (no mpuwe instruction and mpu related registers shown) and only system MPU.

Is it a (so detailed) document for comparison of the spc56ec and spc58ec internal features like MPU?

Is it the same CMPU/SMPU in Chorus 4M like Chorus 6M ?

Thanks! 

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    1 reply

    Erwan YVIN
    Erwan YVIN
    ST Employee
    October 25, 2017
    Posted on October 25, 2017 at 15:41

    Hello Barna ,

    Table 3 is showing you the features list.

    and you should go deeper in the Reference Manual to analyse the MPU

    Between Chorus 4M & 6M, Yes , i think so , it is the same IP (CMPU/SMPU) 

    'There are two Memory Protection Unit levels included in the SPC58xEx/SPC58xGx.

    • The Core Memory Protection Unit (CMPU) is a mechanism included in each core to protect

      address ranges against access by software developed according to lower ASIL. The CMPU

      is typically used by the operating system to ensure inter-task interference protection. (Chapter 15.8 Core Level)
    • The second MPU level is provided by the System MPUs (SMPU) located in each XBAR. (Chap 21)'

             

                         Best regards

                                        Erwan

    Barna Faragó
    Barna FaragóAuthor
    Associate
    October 26, 2017
    Posted on October 26, 2017 at 01:14

    Hi, Erwan ! Thank you! 

    (Notice: the quoted xEx and xGx notation here means E and G lines, but I was focusing on C-line product actually.)

    I was confused on which CMPU are used in which product lines... The product line coding in spc58 family doesn't determinate of CMPU mutch, because of the CMPU depends on core version realy, as far as I understad it well...

    I see roughly that:  earlier 56 family may have e200z446n3, and contains no CMPU but MMU in core (and SMPU on xbar), the next 57 family may contains newer core with cmpu. While the latest 58 family contains

    e200z425d or similar e200z420n3 cores. Here we have CMPUs for each core variant... So ASIL-B or D level maybe depends on something else but not on CMPU itself... Is it more-or-less right?

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