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david tomsa
Associate III
January 23, 2021
Solved

SPC570 IACKR - HighTec IDE - Interrupt

  • January 23, 2021
  • 1 reply
  • 1068 views

Hi guys,

i have the following problem.

I configure the interrupts as follow.

INTC.BCR.R = 0;
INTC.IACKR[0].R = (uint32_t)&VectorTable[0];
INTC.CPR[0].B.PRI = 0;
 
// enable interrupts
__asm__ volatile ("wrteei 1" : : : "memory");

After that, i configure one Etimer Channel with timer compare interrupt. The interrupt flag will set in etimer module, but the ISR will never be called.

If i change my configuration to the following, the interrupts will come:

INTC.BCR.R = 0;
INTC.IACKR[0].R = (uint32_t)&VectorTable[0];
 
(void)INTC.IACKR[0].R; // read back 
 
INTC.CPR[0].B.PRI = 0;
 
// enable interrupts
__asm__ volatile ("wrteei 1" : : : "memory");

I would be happy if someone could explain what I'm doing wrong, because I can't find anything about it in the reference manual.

best regards

david

    This topic has been closed for replies.
    Best answer by Erwan YVIN

    Dear All ,

    Sorry, difficult for me to support Hightec IDE on irq handler .

    Could you give me the HW used ?

    could you check in SPC5Studio 6.0 (spc574kxx_irq_component_rla) (cf below)?

    there is a nice irq handler.

    /**
     * @brief IRQ module initialization.
     *
     * @api
     */
    void irqInit(void) {
     
     irq_cfg_init();
     
     /* Method of accessing memory-mapped registers at fixed addresses does not 
     comply with MISRA C because it involves converting an integer to a 
    	 pointer. */
     /*lint -e9033 */
     /* INTC initialization, software vector mode, 4 bytes vectors, starting
     at priority 0.*/
     
     INTC_BCR = 0;
     
     /* Configure IRQ for main core.*/
     INTC_CPR(MAIN_CORE) = 0;
     INTC_IACKR(MAIN_CORE) = (uint32_t)_vectors;
     
    #if defined(BOOT_CORE0) && (BOOT_CORE0 == 1)
     /* Configure IRQ for secondary core 0.*/
     INTC_CPR(0) = 0;
     INTC_IACKR(0) = (uint32_t)_vectors;
    #endif /* BOOT_CORE0 */
     
    #if defined(BOOT_CORE1) && (BOOT_CORE1 == 1)
     /* Configure IRQ for secondary core 1.*/
     INTC_CPR(1) = 0;
     INTC_IACKR(1) = (uint32_t)_vectors;
    #endif /* BOOT_CORE1 */
     
    #if defined(BOOT_CORE2) && (BOOT_CORE2 == 1)
     /* Configure IRQ for secondary core 2.*/
     INTC_CPR(2) = 0;
     INTC_IACKR(2) = (uint32_t)_vectors;
    #endif /* BOOT_CORE2 */
     
     /*lint +e9033 */
    }

    Best regards

    Erwan

    1 reply

    Erwan YVIN
    Erwan YVINBest answer
    ST Employee
    February 2, 2021

    Dear All ,

    Sorry, difficult for me to support Hightec IDE on irq handler .

    Could you give me the HW used ?

    could you check in SPC5Studio 6.0 (spc574kxx_irq_component_rla) (cf below)?

    there is a nice irq handler.

    /**
     * @brief IRQ module initialization.
     *
     * @api
     */
    void irqInit(void) {
     
     irq_cfg_init();
     
     /* Method of accessing memory-mapped registers at fixed addresses does not 
     comply with MISRA C because it involves converting an integer to a 
    	 pointer. */
     /*lint -e9033 */
     /* INTC initialization, software vector mode, 4 bytes vectors, starting
     at priority 0.*/
     
     INTC_BCR = 0;
     
     /* Configure IRQ for main core.*/
     INTC_CPR(MAIN_CORE) = 0;
     INTC_IACKR(MAIN_CORE) = (uint32_t)_vectors;
     
    #if defined(BOOT_CORE0) && (BOOT_CORE0 == 1)
     /* Configure IRQ for secondary core 0.*/
     INTC_CPR(0) = 0;
     INTC_IACKR(0) = (uint32_t)_vectors;
    #endif /* BOOT_CORE0 */
     
    #if defined(BOOT_CORE1) && (BOOT_CORE1 == 1)
     /* Configure IRQ for secondary core 1.*/
     INTC_CPR(1) = 0;
     INTC_IACKR(1) = (uint32_t)_vectors;
    #endif /* BOOT_CORE1 */
     
    #if defined(BOOT_CORE2) && (BOOT_CORE2 == 1)
     /* Configure IRQ for secondary core 2.*/
     INTC_CPR(2) = 0;
     INTC_IACKR(2) = (uint32_t)_vectors;
    #endif /* BOOT_CORE2 */
     
     /*lint +e9033 */
    }

    Best regards

    Erwan