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Associate
October 13, 2023
Solved

Setting Cs periodically while using Dma

  • October 13, 2023
  • 3 replies
  • 2294 views

Good Day

I am using Spi with Dma. When using the Hal-function "HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)", I want to receive 1000 times Data , which I can set in the size-area. The Problem is that my Spi-peripheral needs constantly Cs-pin to get set and reset to give out Data, else i receive after one usable data just zeros. My question is following: Is there a way to tell the Spi to set and reset the cs when data gets received, and if so, how, or where can this be configured? I am currently using the function in a for loop to receive my Data with the size set to 1. But this is way to slow. Thanks for Helping.

 

 

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Best answer by Squidward

So I could solve the Problem. It is simple as that. I am using the NSSP mode wit 2 cycles in Master Inter Data Idleness

3 replies

TDK
Super User
October 13, 2023

The typical way is to handle CS as a GPIO pin, set it low prior to starting the call and set it high in the RxComplete callback. Or if you're using blocking functions, immediately after HAL_SPI_Receive.

Some series like the STM32H7 have the capability to do this natively.

Why do 1000x loops of 1 byte instead of a single call with 1000 bytes?

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SquidwardAuthor
Associate
October 16, 2023

First of all, thank you TDK,

The Problem is that I have to redo the function in a for, or while loop is that my SPI-Peripheral needs for every data to be send a CS high and low, or else the ADC does not get the information for giving out data. Thats why I want to find out if threr is a way to set CS high and low every time a value gets transmitted, when getting 1000 Bytes by calling this function only once.

 

AScha.3
Super User
October 16, 2023

still no info, what cpu you use ...

ie on H563 u could use TI mode : (if this is, what you want)

AScha3_0-1697446359637.png

SS = CS output

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SquidwardAuthorBest answer
Associate
October 31, 2023

So I could solve the Problem. It is simple as that. I am using the NSSP mode wit 2 cycles in Master Inter Data Idleness