L6599AD latched shutdown

[JK5]

Hi.

I am using the L6599AD without PFC.

When a latched shutdown occurs, the reset condition requires VCC power to fall below UVLO.

I'm using an offline high voltage buck ic to make 15V for the VCC power.

The problem here is that the L6599AD has a small current draw when it is in the shutdown state.

Even when the AC is turned off, it takes a long time for the voltage charged on the capacitors of the high-voltage buck IC to drop below the UVLO.

I don't know of any way to disable the L6599AD's latch.

What I want is for the L6599AD to release the latch when the AC is turned off and then turned on immediately.

Is there a good way to do this?

 

[Peter BENSCH]

The latch function is realised in hardware and cannot be deactivated.

However, you could connect a discharge resistor in parallel to the capacitors at VCC, which discharges them during latch-up? As the L6599A has a maximum operating current of 5mA, you would only draw 682µA more current at VCC=15V with a discharge resistor of 22k, but would discharge an assumed capacitor of 10µF in just under half a second.

Regards
/Peter