MOS FET with built-in TVS diode.
I want help to understand this.
The STM MOS FET STP6NK60ZFP has a MAX gate-source voltage (Vgs) at 30V. In order to protect it from ESD it has a built-in TVS diode. Over 30V it can fail. But the bulit-in TVS has breakdown voltage (Vbr) set at 30V. It's when it begins to conduct. The clamping voltage (Vcl) is a couple of volts more. It's when it conducts fully. But then it's over the limit 30V. More voltage than that can make the MOS FET fail. Shouldn't it be that the Vcl should be 30V so an ESD can't exceed 30V? Or is it really enough with Vbr at 30V and Vcl some volts more? Se table below.

