SPI L9026 frame counter value

[Mirco_sms]

good morning, i ave a question.

This indication relating to the "frame counter value" appears in the manual of L9026.
"As additional safety feature, the protocol is also equipped with 1 PARITY bit (odd parity) and a 1 bit frame counter;
the frame counter value to be considered at the beginning of a new communication session after a reset action
is "0" "

FR_CNT frame counter bit, how il should be handler arter beginning of a new communication?

Thank you in advance

mirco

 

[occhipia]

Good morning,

 

every time an SPI data frame is received this bit changes its state. For each frame the microcontroller must toggle this bit into the Serial IN coherently with the device's internal frame counter.
If the frame counter of the device is not consistent with the one that the microcontroller send, an SPI error is generated and the frame is rejected. The same behavior is expected for serial OUT.

 

regards