Dear ST community I would like to use STDRIVE 101 similar to STEVAL-POOL4A board (s. schematic above). But to reduce number of PWM pins used I'd like to pull all the ENx pins to VDD (e.g. +3.3V) and drive only INx's pins by an advanced timer.
According to "DS13472 - Rev 2" and "Table 8" on page 17 it shall be feasible. Could you confirm?
What would be possible disadvantages of 3 PWM design regarding 6 PWM design?
Yes, you can connect ENx/INLx to logic H and control the half bridges via INx. However, please note the DT/MODE pin, the function of which is described in section 5.3 of the data sheet.
With this approach (you called it 3 PWM), you either have no dead time or a fixed one of 1µs, depending on the DT/MODE connection. With separate control of the high and low sides via INHx and INLx, the dead time is determined by the controlling controller, which can be useful for slow power switches such as some IGBTs.
Hope that helps?
Regards
/Peter
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