The datasheet of the powerStep01 says: After each Byte the CS Pin must be toggeled, but in the diagramm the CS Pin is toggeled between these four bytes. What is correct? Are there additional failures in that datasheet?

[SJank.3]

[Peter BENSCH]

This is just a misunderstanding.

The statement "After each byte transmission the /CS input must be raised and kept high ..." means the transmission of a complete command or a block of data, which can consist of several bytes. [edit: see next message]

In this respect, /CS has the same function as with all SPI devices, where data is transmitted with /CS = active, while the rising edge initiates the end of the sequence and the start of e.g. the decoding of the command.

Hope that answers your question?

Regards

/Peter

[SJank.3]

Thank you for your answer Mr Bensch,

and i thought MSB stands for Most Significant Bit and LSB stands for Least Significant Bit?

[Peter BENSCH]

Sorry, I had misinterpreted something, my previous statement is incorrect.

Yes, MSB stands for Most Significant Bit and yes, /CS must indeed have a rising edge after each transmitted byte for transfer to the internal registers.

[SJank.3]

Thank you for your correction after my missunderstanding question^^