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AKUMA.5
Visitor II
August 14, 2022
Question

Totem pole PFC Control loop designs

  • August 14, 2022
  • 0 replies
  • 794 views

The page number 46 current control design, The DPWM gain is given as 10^-3. The PWM Timer max value is 1000 for 72kHz freq for a clock of 72MHz. Then 1000 means 100% duty, 500 means 50% Duty.. etc. So the per unit duty (0 to 1) Shall be multiplied with a gain of 10^3 will give the digital pwm duty. So DPWM gain is 10^3 instead of 10^-3 ?

Correct me if my understanding is wrong !

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