Question
A question about 6-step for X-NUCLEO-IHM16M1
- MC Workbench generates a 6 step_sensless code for the following board:
- Type: 6-Step / Voltage Mode
- Control: NUCLEO-G431RB
- Power: X-NUCLEO-IHM16M1
- Motor: GimBal GBM2804H-100T
- Code: pwmc-3pwm.c in middle-ware
Question: In each step, it looks like PWM-ch1 (High-side MOSFET) and Enable pin( Low-side MOSFET) turn on at the same step? For example,in Case STEP_1, both "PWM_ch1(for U)" and "pwm-en-U-pin" are set to high, why it will not cause short circuit?
/* pwmc-3pwm.c 6 steps DC brushless motor
/*_weak void ThreePwm_LoadNextStep( PWMC_ThreePwm_Handle_t * pHandle, int16_t Direction )*/
/* 372-442*/
/* standard configuration */
else
{
if (pHandle->DemagCounter >= pHandle->_Super.DemagCounterThreshold )
{
pHandle->FastDemagUpdated = true;
ThreePwm_ResetOCPolarity(pHandle);
LL_TIM_GenerateEvent_COM( TIMx );
}
switch ( pHandle->_Super.NextStep )
{
case STEP_1:
{
LL_TIM_OC_SetCompareCH1 ( TIMx, (uint32_t)pHandle->_Super.CntPh );
LL_TIM_OC_SetCompareCH2 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH3 ( TIMx, 0 );
LL_GPIO_ResetOutputPin( pHandle->pParams_str->pwm_en_w_port, pHandle->pParams_str->pwm_en_w_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_u_port, pHandle->pParams_str->pwm_en_u_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_v_port, pHandle->pParams_str->pwm_en_v_pin );
}
break;
case STEP_2:
{
LL_TIM_OC_SetCompareCH1 ( TIMx, (uint32_t)pHandle->_Super.CntPh );
LL_TIM_OC_SetCompareCH2 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH3 ( TIMx, 0 );
LL_GPIO_ResetOutputPin( pHandle->pParams_str->pwm_en_v_port, pHandle->pParams_str->pwm_en_v_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_u_port, pHandle->pParams_str->pwm_en_u_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_w_port, pHandle->pParams_str->pwm_en_w_pin );
}
break;
case STEP_3:
{
LL_TIM_OC_SetCompareCH1 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH2 ( TIMx, (uint32_t)pHandle->_Super.CntPh );
LL_TIM_OC_SetCompareCH3 ( TIMx, 0 );
LL_GPIO_ResetOutputPin( pHandle->pParams_str->pwm_en_u_port, pHandle->pParams_str->pwm_en_u_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_v_port, pHandle->pParams_str->pwm_en_v_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_w_port, pHandle->pParams_str->pwm_en_w_pin );
}
break;
case STEP_4:
{
LL_TIM_OC_SetCompareCH1 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH2 ( TIMx, (uint32_t)pHandle->_Super.CntPh );
LL_TIM_OC_SetCompareCH3 ( TIMx, 0 );
LL_GPIO_ResetOutputPin( pHandle->pParams_str->pwm_en_w_port, pHandle->pParams_str->pwm_en_w_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_u_port, pHandle->pParams_str->pwm_en_u_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_v_port, pHandle->pParams_str->pwm_en_v_pin );
}
break;
case STEP_5:
{
LL_TIM_OC_SetCompareCH1 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH2 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH3 ( TIMx, (uint32_t)pHandle->_Super.CntPh );
LL_GPIO_ResetOutputPin( pHandle->pParams_str->pwm_en_v_port, pHandle->pParams_str->pwm_en_v_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_u_port, pHandle->pParams_str->pwm_en_u_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_w_port, pHandle->pParams_str->pwm_en_w_pin );
}
break;
case STEP_6:
{
LL_TIM_OC_SetCompareCH1 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH2 ( TIMx, 0 );
LL_TIM_OC_SetCompareCH3 ( TIMx, (uint32_t)pHandle->_Super.CntPh );
LL_GPIO_ResetOutputPin( pHandle->pParams_str->pwm_en_u_port, pHandle->pParams_str->pwm_en_u_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_v_port, pHandle->pParams_str->pwm_en_v_pin );
LL_GPIO_SetOutputPin( pHandle->pParams_str->pwm_en_w_port, pHandle->pParams_str->pwm_en_w_pin );
}
break;
}