B-G431B-ESC1 Layout Question (Via Current)
Hello,
I have had a look over the B-G431B-ESC1 Layout Files and found that the High Side FETs are connected to V+ with a single Via.
The brown layer is V+, the large red pad is where the FET Drain is connected.
I can only see the single via i marked. The production files state the same.
This via can only carry about 1A of current, so this is definitely a design flaw.
Can you please check if there is a error in the design files I downloaded or if I am right.
@Laurent Ca...
