Board damage during EEPROM emulation write with MCSDK (STEVAL-IHM045V1 + STM32F303
Subject: Critical issue: Board damage during EEPROM emulation write with MCSDK (STEVAL-IHM045V1 + STM32F303)
In Hello Experts,
I am working with STEVAL-IHM045V1 power board and STM32F303 evaluation board, running MCSDK (FOC, PMSM, dual motor).
Mcsdk 6.41
Current control approach
I am using ProgramTorqueRamp() instead of ProgramSpeedRamp() because speed mode causes audible noise and instability at low speeds.
Motors run normally under wall control.
Wall control uses 1-wire USART-based communication customized.
User sets a PWM-like value from wall control, which I map to a torque reference.
By calling Mcacknowledge(); ProgramTorqueRamp(torque_ref, 4000); startmotor(); in the while loopTarget - The user-selected pwm value must be stored using EEPROM emulation (Flash write). Example user can set any pwm, in Speed 1 pwm 25 , speed 2 pwm 45, speed 3, pwm 65 , speed 4 pwm 75, speed 5 pwm 100
Critical problem
When I attempt to write EEPROM emulation while the motors are running, the system:
Sometimes triggers watchdog reset
In several cases physically damages (blows) the power board
If I do not write EEPROM, the motors run fine at all speed and fixed pwm.
If I delay EEPROM write, watchdog reset still occurs in some cases.
My understanding so far
Flash / EEPROM emulation write blocks CPU execution.
SysTick and MC background tasks may stop.
PWM update / FOC timing may break, potentially causing unsafe inverter states.
Watchdog reset during Flash write may leave PWM outputs undefined.
Questions
What is the ST-recommended safe method to store user parameters (torque / PWM setting) when using MCSDK?
Is it mandatory to stop the motor and disable PWM outputs before any Flash / EEPROM write?
For torque mode using ProgramTorqueRamp(), what is the recommended way to map a user PWM input to torque reference?
On STEVAL-IHM045V1:
Is the gate driver hardware guaranteed to be OFF during MCU reset or Flash write?
Is additional hardware PWM inhibit required?
Is there a reference implementation or application note for:
EEPROM emulation with MCSDK
Safe NVM writes without risking power stage damage?
This issue is urgent, as repeated EEPROM writes are leading to hardware failure.
Any guidance, reference design, or recommended architecture would be greatly appreciated.
Thank you for your support.
Best regards,
