Issue with Single-Shunt Topology in MCSDK 5.Y.2 on STM32G431RB

[schultz]

Hello everyone,

I am using MCSDK 5.Y.2 with an STM32G431RB MCU on a custom board. I can successfully run the motor using the three-shunt topology. However, when I switch to the single-shunt topology, the motor does not start.

I checked the mc_api.c calls for both configurations, and they are the same. On the single-shunt board, I immediately get bState = FAULT_OVER right after bState = START. This issue does not occur with the three-shunt board.

When generating the motor code, I noticed some differences in the file structure:

• For the three-shunt topology, the directory MCSDK_v5.Y.2-Full\MotorControl\MCSDK\MCLib\G4xx\Src is created, containing the file r3_2_g4xx_pwm_curr_fdbk.c.
• For the single-shunt topology, this directory is not created, and instead, the file r1_ps_pwm_curr_fdbk.c is placed in the Src directory. Was r1_g4xx_pwm_curr_fdbk.c removed on  MCSDK5.Y.2?

Could I be missing a difference in the state machine or configuration between the two topologies?

Below is the code I use to start the motor in my custom software:

 

State_t eMCState;
eMCState = MC_GetSTMStateMotor1();
if (eMCState == IDLE)
{
 MC_ProgramSpeedRampMotor1(SpeedCommandRPM/6, RampDurationMs);
 MC_StartMotor1();
}

 

Any guidance on resolving this issue or identifying the root cause would be greatly appreciated.

Thank you!

[GMA]

Hello @schultz,

File structure is normal.
Could you check your 1Shunt power board HW configuration? 

[schultz]

Thank you for the reply. I'll verify the configuration. 
The issue is in waitForPolarizationEnd. cnt Should increase each time Index increases in R1_HFCurrentsCalibration. But it only enters pHandle->Index++; once. Can this be related to my hardware configuration? Or my ADC ISR configuration?

 

 

static void R1_HFCurrentsCalibration( PWMC_Handle_t * pHdl, ab_t * pStator_Currents )
{
 /* Derived class members container */
 PWMC_R1_Handle_t * pHandle = ( PWMC_R1_Handle_t * )pHdl;
 TIM_TypeDef * TIMx = pHandle->pParams_str->TIMx;
 ADC_TypeDef * ADCx = pHandle->pParams_str->ADCx;

 /* clear flag used for FOC duration check */
 LL_TIM_ClearFlag_UPDATE(TIMx);

 /* Disabling the External triggering for ADCx */
 LL_TIM_SetTriggerOutput2( TIMx, LL_TIM_TRGO_RESET );

 if ( pHandle->Index < NB_CONVERSIONS )
 {
 pHandle->PhaseOffset += ADCx->JDR2 ;
 pHandle->Index++;
 }

 /* during offset calibration no current is flowing in the phases */
 pStator_Currents->a = 0;
 pStator_Currents->b = 0;

}

 

 

 

__weak void waitForPolarizationEnd (TIM_TypeDef *TIMx, uint16_t *SWerror, uint8_t repCnt, volatile uint8_t *cnt)
{
	uint16_t hCalibrationPeriodCounter;
	uint16_t hMaxPeriodsNumber;

	hMaxPeriodsNumber = (2 * NB_CONVERSIONS) * (((uint16_t) repCnt + 1u) >> 1);

	/* Wait for NB_CONVERSIONS to be executed */
	LL_TIM_ClearFlag_CC1 (TIMx);
	hCalibrationPeriodCounter = 0u;
	while (*cnt < NB_CONVERSIONS)
		{
			if (LL_TIM_IsActiveFlag_CC1 (TIMx))
				{
					LL_TIM_ClearFlag_CC1 (TIMx);
					hCalibrationPeriodCounter++;
					if (hCalibrationPeriodCounter >= hMaxPeriodsNumber)
						{

							if (*cnt < NB_CONVERSIONS)
								{
									*SWerror = 1u;
									break;
								}
						}
				}
		}
}

 

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