Noisy Torque/Phase Currents

[Nikolaj_TL]

I have a custom board, which is based on the STEVAL-SPIN3201, it is used to control a low inductance BLDC motor with hall-sensors (100µH). 

The motor controller is running and is able to control the motor. Unfortunately the phase currents tell that there is something that needs more care. 
There are two problems. The first is that the phase currents are not as neat and harmonic as I might wish, the second (and main problem) is that once in a while every 10 seconds or so I see this iregularity:
The three phase currents:

I am uncertain of how I shall debug this, I suspect it has something to do with the current sensing. I would like to dump the raw current measurements from the ADC, but I do not think the chip is fast enough to do so. 
I have tried to filter the current sensing circuit, but without any luck and without a way of quantifying the noise it is hard to compare. 

How would you go about debugging this?

Informations:
Motor: BLDC with Hall sensors
Motor Control WorkBench: Version: 6.2.1
MCU: STM32SPINF0
Inverter Board: Custom, based on STEVAL-SPIN3201
Algorithm: FOC
Control Mode: Torque/Speed Control
Other: PWM Freq. 30kHz, REGULATION_EXECUTION_RATE: 2 

[Gael A]

Hello Nikolaj_TL,

Thank you for your question, I will try to give you a few advice on what may be the root cause of your issue.

First of all, try reducing your PWM frequency : 30 kHz, even with an execution rate of 2, is asking a lot for at F0 chip, so I would start with this.

Check that sampling is done correctly : having a PIN set at each ADC conversion will let you look at the sampling instant, that you can compare with the PWM window to see if the sampling is right.

Please consider upgrading your MCSDK to its latest version (6.3.2). This is a general advice as we constantly try to improve our solution to fix any issue we might come across.

[Nikolaj_TL]

Hello @Gael A,

 

Thank you for your advices. Good idea to set a pin on each ADC conversion. How would you set the PIN as each ADC conversion is these are triggerede externally by TIM1 Ch4? Is it possible to setup TIM1 Ch4 to interrupt while being setup as PWM?

 

 

[Gael A]

Hello Nikolaj_TL,

You can check the STM32F0 reference manual to check if that is allowed, or simply try and see.

I personally toggle the pin at the beginning of the CURRENT_REGULATION handler, as it happens at the end of the DMA transfer after the ADC conversion, so knowing your entire sampling time roughly gives you the starting point. It is a bit intrusive and not the most precise but for what you are trying to check it is sufficient.

[Nikolaj_TL]

Hello @Gael A,

I have set the PWM frequence down to 20kHz in order to ease the chip. This results in significantly larger ripples (due to the low motor inductance) and less frequent distortion in the phase currents, but larger distortion. 

 

I managed to make the measurement you suggested. 
I have read the doc about current sampling in the Motor Control SDK (Current sampling in three-shunt topology using one A/D converter), but have a hard time analysing wether the sampling timing is ok.

Ch1: DMA1_Ch1_IRQ (called after the ADC and DMA finishes)
CH2-4: Phase voltages

*OBS: please ignore the noise on ch1 it is due to a quick measurement setup

I also did a measurement with a current probe (I only have a 4-channel oscilloscope)

What can you make out of this?
(full measurements are attached below)

 

[Gael A]

Hello Nikolaj_TL,

Your total estimated sampling time can be found in the code file parameters_conversion.h, it is named TW_BEFORE_R3_1. It is equal to the latency between ADC triggering and sampling, plus twice your ADC sampling time (sampling 2 phases on 1 ADC), plus the conversion time (between sampling 1 & 2). When looking at your graphs, if you see that the end of the conversion (pin toggling) minus that total sampling time is putting you to an instant where actual currents are still unstable from the PWM switching (you can first look how close to the Phase Voltages switching you are), then you probably need to increase your dead time.

Also, it might be interesting to see whether you have a recurring pattern for your current instabilities. As you may know from the User Manual you were referring to, the sampling instant is not always the same depending on the modulation level. Maybe your instabilities occur only during a specific case with a bad sampling or maybe two cases are switching from one another in rapid succession which could explain the behaviour. Looking at your Ialpha Ibeta in XY graph can also help you look at this kind of behaviour.

[Nikolaj_TL]

Hello @Gael A,

The total estimated sampling time in my case is (as you mentioned):
(ADC_TRIG_CONV_LATENCY_CYCLES + ADC_SAMPLING_CYCLES*2 + ADC_SAR_CYCLES)/ADC_CLK_MHz
(4+7.5*2+12.5)/14MHz = 2.25µs
Numbers from MCWB SDK are based on ds10111.stm32f031c6 Table 50. ADC characteristics.

When reading MC_SDK/Documentation/docs_2current__sensing__3shunt__1_a_d_c the sampling in most cases takes place at the low side of the phases. 

except for when there is not space in the low side of phases and it is done just prior. 

 

I have a hard time matching the sampling theory with the measurements I have made. These three measurements are representative for most samplings. But all off the measurements show that the sampling crosses a phase edge, which as I understand it it shouldn't (based on the documentation).
   
Ch1: DMA1_Ch1_ISR (ADC sampling finished and transfered to memory)
Ch2-4: Phase voltages

PWM: 20kHz

 

What do you make of these?

 

 

[Gael A]

Hello Nikolaj_TL,

Currently, the implementation of the current sampling does not correspond exactly to the theory depicted in the User Manual, which could explain the discontinuities between the UM and the actual sampling window. This has been done for space and speed issue, but may be changed in ulterior versions of the MCSDK. Also, keep in mind that your Pin is toggled after DMA transfer, which effectively happens after a second conversion of the ADC, plus DMA transfer, so your real sampling windows will be slightly shifted to the left. Their length is correct though. This means your third sampling case is probably happening before the switching and not during.

On a more pragmatic point of view, please try to find a way to check if the current instabilities happen in a specific sampling case. Also, have you tried increasing the dead time to ensure sampling during a suitable window ?

[Nikolaj_TL]

Hello @Gael A, 

I have tried to increase the deadtime (SW_DEADTIME_NS from 850ns to 1200ns) but without any effect on the current instabilities. 

Yes, the pin toggle is delayed by the ADC Conversion Time of Second Sampling + DMA Transfer time + TogglePin execution delay. 

What do you mean by "find a way to check if the current instabilities happen in a specific sampling case"?
How do I distinguish different samplings frome one another, when I cannot use the cases listed in the documentation?

Best regards Nikolaj T. Lonka

[Gael A]

Hello Nikolaj_TL,

Though the boundaries are not exactly the same, they are fairly similar, at least enough for you to separate each case. You can check the implementation of the R3_1_SetADCSampPointSectX() function inside the r3_f0xx_pwm_curr_fdbk.c file to see exactly what the differences are.

If you want your system to behave more like the User Manual, you can try changing your r3_f0xx_pwm_curr_fdbk.c file to the attached one.

You will also have to do the following modification in mc_parameters.c :

 .Tcase2 = (uint16_t)TW_BEFORE_R3_1 + (uint16_t)TDEAD + (uint16_t)TRISE,
 .Tcase3 = ((uint16_t)TDEAD + (uint16_t)TNOISE + (uint16_t)TW_BEFORE_R3_1) / 2u,

This will finally require some alignments on a few variables name : Tafter instead of hTafter for example, and CalibSector that needs to be changed to PolarizationSector.
Also, consider upgrading to MCSDK 6.3.2.

 

[Nikolaj_TL]

Hello @Gael A, 

I have investigated the samplings cases for different PWM frequencies and excecution rates.
10kHz, 1 exec. rate
20kHz, 2 exec. rate
15kHz, 1 exec. rate
30kHz, 2 exec. rate

At lower PWM frequencies (10kHz & 15kHz, at intermediate load) ADC sampling is only done at half_pwm point (the common case). The timing for the ADC looks good. Still there is noise in the phase currents. 

 

I have further investigated the noise at 15kHz, 1 exec. rate

I toggle a pin at the common sampling case to illustrate that this samplings case is exclusively used (can also be seen in the ADC timing as you mentioned)
 
(Red is the toggled pin)

ADC Timing is verified by toggling another pin at ADC start and DMA finish. 

Blue is the debug pin
Other signals are phase voltages

 

The noise/distortion correlates with when the phase currents cross each other. Every time this happens the phase current with the largest duty cycle exchanges and this is the assumed cause of the noise I see.

What could this have to do with the phase current noise in the later PWM periods?
Maybe it is HW related, I am unsure

 

[Gael A]

Hello Nikolaj_TL,

Thank you for all the investigation, the data is really interesting. This is indeed a strange behaviour. Unfortunately I have no answer to give you right now. We will try to reproduce your issue on our end to see what can be done.

In the meantime, something is still bugging me :

If the instability is correlated with the switching of the max duty phase, then this should not be impacted by the change of PWM frequency. In one of your previous post, you mentioned that the current instabilities occur less frequently for lower PWM frequencies.
However, for a given electrical speed, the frequency at which the max duty window is switched should be the same, whatever the PWM frequency. Could you investigate further on this ? Maybe the cause of the instabilities is not the one that seems to appear on the graph you showed.

[Nikolaj_TL]

Hello @Gael A,

For a given electrical speed, the frequency at which the max duty window is switched is the same, whatever the PWM frequency. I suspect that higher PWM frequencies are subject to other sources of noise as well. 
This was the reason for choosing to debug the lower PWM frequency (at 15kHz) because it had least distortion. 

OBS: I should have show equal amount of periods from the three tests, but realised it late. The message shines through anyway, at 15kHz there is least distortion

 

I am not sure I understand what you would like me to do reagrding the max duty widow at a specific electrical speed

[Nikolaj_TL]

Hello @Gael A,

Has it been possible to reproduce the behaviour at your end?