Six step using timer synchronization for sensorless BLDC motor control
Hi All
I hope someone of ST Micro's engineer show this.
I'm working on for sensorless BLDC motor control using six step method.
I use STM32G474 Nucleo board for test.
To realize the six step control, I use TIM1 and TIM2 synchronization for commutation. The modulation I use is high side sync rectification PWM modulation. Approximately, six step control works. However, there are some problems that timing at the time of commutation is not match as below figure.. I will upload the waveform of the PWM signal recorded by Saleae Logic.
In my application, not use Hall sensor. The target output is that the PWM switches correctly during commutation as shown in the figure below.
In the figure is writen that "write CCxE, CCxNE, and OCxM for next step" after a COM event for the next step.
I wrote the code according to this, but it cannot be improved by any combination of settings.
So, I want to ask to ST Micro engineer, if possible please show me a simple sample code.
My code for set the next step is like this,
void MC_SixStep_SetNextStep(MC_SixStep_t *p)
{
switch (p->sixStepCount)
{
case 0:
/* UH, VL */
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC2NE;
__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_3, p->pwm.period);
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC3NE;
break;
case 1:
/* UH, WL */
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC1E;
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC1NE;
__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_2, p->pwm.width - 1);
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC2E;
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC2NE;
break;
case 2:
/* VH, WL */
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC3NE;
__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_1, p->pwm.period);
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC1NE;
break;
case 3:
/* VH, UL */
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC2E;
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC2NE;
__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_3, p->pwm.width - 1);
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC3E;
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC3NE;
break;
case 4:
/* WH, UL */
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC1NE;
__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_2, p->pwm.period);
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC2NE;
break;
case 5:
/* WH, VL */
__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_1, p->pwm.width - 1);
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC1E;
htim1.Instance->CCER |= (uint16_t) TIM_CCER_CC1NE;
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC3E;
htim1.Instance->CCER &= (uint16_t) ~TIM_CCER_CC3NE;
break;
default:
break;
}
p->sixStepCount++;
p->sixStepCount %= 6;
}