Yes, the F4/F2/F1 implementation is somewhat restrictive, but both the M3/M4 cores have a bit reversal instruction. So groups of 4 bytes can be handled directly, and the trailing bytes managed separately.The F3/F0 parts have a more flexible solution.
Dear clive, please point me what i am doing wrong. The problem isdifferent CRC on PC and MCU.
//Calculate CRC using hardware stm32 crc modul
for
(i=4; i<64; i= i+4){
CRC->CR |= CRC_CR_RESET;
memcpy
(&temp_32, &UserRxBufferFS[i], 4);
CRC->DR = temp_32;
//Wrong as PC value
}
//PC side (visual studio). I use your function.
uint32_t i;
CRC_result = 0xFFFFFFFF;
for
(i=4; i<64; i = i+4){
memcpy
(&temp_32, &Output[i] , 4);
CRC_result = Crc32Fast(CRC_result, temp_32);
}
DWORD
Crc32Fast(
DWORD
Crc,
DWORD
Data)
{
static
const
DWORD
CrcTable[16] = {
// Nibble lookup table for 0x04C11DB7 polynomial
0x00000000,0x04C11DB7,0x09823B6E,0x0D4326D9,0x130476DC,0x17C56B6B,0x1A864DB2,0x1E475005,
0x2608EDB8,0x22C9F00F,0x2F8AD6D6,0x2B4BCB61,0x350C9B64,0x31CD86D3,0x3C8EA00A,0x384FBDBD };
Crc = Crc ^ Data;
// Apply all 32-bits
// Process 32-bits, 4 at a time, or 8 rounds
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
// Assumes 32-bit reg, masking index to 4-bits
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
// 0x04C11DB7 Polynomial used in STM32
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
Crc = (Crc << 4) ^ CrcTable[Crc >> 28];
return
(Crc);
}