How to remove sbsfu code

[asala.19]

Hi support team,

i am testing the sbsfu code in P-NUCLEO-WB55 but i missed out to disable security ips SECBOOT_DISABLE_SECURITY_IPS and flash into the board it set RDP level to 1 also set SFU_WRP_PROTECT_ENABLE, SFU_TAMPER_PROTECT_ENABLE,SFU_DAP_PROTECT_ENABLE,SFU_MPU_PROTECT_ENABLE... .

now i want to remove this code and flash other application but i can not debug or run as application via IDE(AC6 or cubeide) it through error: write protection detected check RDP and WRP protection options.

Please help me out to resolve above issue.

I have change RDP from 1(BB) to 0(AA) but issue is not resolve.

Thanks,

Arjun

[alister]

Per RM0433 and UM2262 and others...

An RDP L0 regression from L1 performs a mass-erase.

So you have to connect a ST-LINK or similar, change the RDP to level 0 (which does the mass-erase) and disable the WRPs.

This leaves user flash empty.

Then you have to re-load the combined SBSFU and app, or just the SBSFU and use it to re-load the app.

[asala.19]

Hi @alister​ 

Thanks for your support resolve the issue by changing WRP1A_START and WRP1A_END (WRPxy_START > WRPxy_END = No WRP or unprotected, as mentioned in RM0434 ).

Thanks,

Arjun

[asala.19]

Hi @alister​ 

Thanks for quick response i am using stcubeprogrammer for change RDP level, it change successfully from 1 to 0 but i can't find how to disable WRPs

please find attached image

Thanks,

Arjun

[alister]

STM32CubeProgrammer isn't intuitive. You'll have to check RM0434 and try to correlate its description of WRP with this GUI.

Alternatively, if you have an older tool called "STM32 ST-LINK Utility", that was pretty easy to understand.

[jarus0]

Hello Everyone, I'm in exactly the same situation.

I've changed RDP and WRPxy_START, WRPxy_END

Please find the values in the below log.

./STM32_Programmer_CLI -c port=swd -ob displ 
 -------------------------------------------------------------------
 STM32CubeProgrammer v2.12.0 
 -------------------------------------------------------------------
 
ST-LINK SN : 0671FF313736504157192620
ST-LINK FW : V2J40M27
Board : NUCLEO-G070RB
Voltage : 3.22V
SWD freq : 4000 KHz
Connect mode: Normal
Reset mode : Software reset
Device ID : 0x460
Revision ID : Rev B
Device name : STM32G07x/STM32G08x
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0xB2
Debug in Low Power mode enabled
 
 
UPLOADING OPTION BYTES DATA ...
 
 Bank : 0x00
 Address : 0x40022020
 Size : 112 Bytes
 
[==================================================] 100% 
 
 
OPTION BYTES BANK: 0
 
 Read Out Protection:
 
 RDP : 0xAA (Level 0, no protection) 
 
 BOR Level:
 
 BOR_EN : 0x0 (Configurable brown out reset disabled, power-on reset defined by POR/PDR levels) 
 BORR_LEV : 0x0 (BOR rising level 1 with threshold around 2.1 V) 
 BORF_LEV : 0x0 (BOR falling level 1 with threshold around 2.0 V) 
 
 User Configuration:
 
 nRST_STOP : 0x1 (No reset generated when entering Stop mode) 
 nRST_STDBY : 0x1 (No reset generated when entering Standby mode) 
 nRST_SHDW : 0x1 (No reset generated when entering the Shutdown mode) 
 IWDG_SW : 0x1 (Software independant watchdog) 
 IWDG_STOP : 0x1 (IWDG counter active in stop mode) 
 IWDG_STDBY : 0x1 (IWDG counter active in standby mode) 
 WWDG_SW : 0x1 (Software window watchdog) 
 RAM_PARITY_CHECK: 0x1 (SRAM parity check disable) 
 nBOOT_SEL : 0x1 (BOOT0 signal is defined by nBOOT0 option bit) 
 nBOOT1 : 0x1 (Boot from Flash if BOOT0 = 0, otherwise system memory) 
 nBOOT0 : 0x1 (nBOOT0=1) 
 NRST_MODE : 0x3 (Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)) 
 IRHEN : 0x1 (Internal resets drives NRST pin low until it is seen as low level) 
 
 PCROP Protection:
 
 PCROP1A_STRT : 0xFF (0x801FE00) 
 PCROP1A_END : 0x0 (0x8000200) 
 PCROP_RDP : 0x0 (PCROP zone is kept when RDP is decreased) 
 PCROP1B_STRT : 0xFF (0x801FE00) 
 PCROP1B_END : 0x0 (0x8000200) 
 
 Write Protection:
 
 WRP1A_STRT : 0x0 (0x8000000) 
 WRP1A_END : 0x0 (0x8000000) 
 WRP1B_STRT : 0x3F (0x801F800) 
 WRP1B_END : 0x0 (0x8000000) 
 
 FLASH security:
 
 BOOT_LOCK : 0x0 (Boot based on the pad/option bit configuration) 
 SEC_SIZE : 0x20 (0x8010000)

Let me know how to resolve this.