SBSFU : how to remove write protection?

[ANaga.2]

Hi,

I forgot to comment the protections set in app_sfu.h and tried debugging the code.

Later I realized and commented everything and it is not allowing me to flash the program on the device.

I made RDP level 0 from cube programmer, but still write protection is enabled which is not allowing me to format the device.

Could anyone please let me know how can i remove write protections in cube programmer.

Thanks,

Ankush

[Nesrine.JLASSI]

Hello @ANaga.2​ ,

Could you please give me more details about the Board name used .

Best regards,

Nesrine

[ANaga.2]

Its L476RG

[Nesrine.JLASSI]

Hi @ANaga.2​ 

Please try this command" -c port=swd -ob displ "then tell me the output to check the issue.

C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer-2.5.0\bin>STM32_Programmer_CLI.exe -c port=swd -ob displ

   -------------------------------------------------------------------

            STM32CubeProgrammer v2.5.0

   -------------------------------------------------------------------

ST-LINK SN : 0669FF303435554157042733

ST-LINK FW : V2J30M19

Board    : NUCLEO-L476RG

Voltage   : 3.26V

SWD freq  : 4000 KHz

Connect mode: Normal

Reset mode : Software reset

Device ID  : 0x415

Revision ID : Rev 4

Device name : STM32L4x1/STM32L475xx/STM32L476xx/STM32L486xx

Flash size : 1 MBytes

Device type : MCU

Device CPU : Cortex-M4

UPLOADING OPTION BYTES DATA ...

 Bank     : 0x00

 Address    : 0x40022020

 Size     : 20 Bytes

██████████████████████████████████████████████████ 100%

 Bank     : 0x01

 Address    : 0x40022044

 Size     : 16 Bytes

██████████████████████████████████████████████████ 100%

OPTION BYTES BANK: 0

  Read Out Protection:

   RDP     : 0xAA (Level 0, no protection)

  BOR Level:

   BOR_LEV   : 0x0 (BOR Level 0, reset level threshold is around 1.7 V)

  User Configuration:

   nRST_STOP  : 0x1 (No reset generated when entering Stop mode)

   nRST_STDBY  : 0x1 (No reset generated when entering Standby mode)

   nRST_SHDW  : 0x1 (No reset generated when entering the Shutdown mode)

   IWDG_SW   : 0x1 (Software independant watchdog)

   IWDG_STOP  : 0x1 (IWDG counter active in stop mode)

   IWDG_STDBY  : 0x1 (IWDG counter active in standby mode)

   WWDG_SW   : 0x1 (Software window watchdog)

   BFB2     : 0x0 (Dual-bank boot disable)

   nBOOT1    : 0x1 (Boot from Flash if BOOT0 = 0, otherwise system memory)

   SRAM2_PE   : 0x1 (SRAM2 parity check disable)

   SRAM2_RST  : 0x1 (SRAM2 is not erased when a system reset occurs)

  PCROP Protection (Bank 1):

   PCROP1_STRT : 0xFFFF (0x807FFF8)

   PCROP1_END  : 0x0 (0x8000000)

   PCROP_RDP  : 0x0 (PCROP zone is kept when RDP is decreased)

  Write Protection (Bank 1):

   WRP1A_STRT  : 0xFF (0x807F800)

   WRP1A_END  : 0x0 (0x8000000)

   WRP1B_STRT  : 0xFF (0x807F800)

   WRP1B_END  : 0x0 (0x8000000)

OPTION BYTES BANK: 1

  PCROP Protection (Bank 2):

   PCROP2_STRT : 0xFFFF (0x80FFFF8)

   PCROP2_END  : 0x0 (0x8080000)

  Write Protection (Bank 2):

   WRP2A_STRT  : 0xFF (0x80FF800)

   WRP2A_END  : 0x0 (0x8080000)

   WRP2B_STRT  : 0xFF (0x80FF800)

   WRP2B_END  : 0x0 (0x8080000)

Best regards,

Nesrine

[ANaga.2]

It worked. Thank you so much

[jarus0]

Hello everyone, We were testing out the SBSFU example for our 2 running projects.

But currently, we are unable to upload any other program to the device.

Here is the STM32CubeProgrammer log for "Full chip erase" request

 15:26:43:686 : MASS ERASE ... 
 15:26:43:693 : Flash erase...
 15:26:43:694 : halt ap 0 
 15:26:43:716 : Init flashloader...
 15:26:43:716 : halt ap 0 
 15:26:43:718 : run ap 0 
 15:26:43:735 : halt ap 0 
 15:26:43:735 : Loader mass erase...
 15:26:43:737 : run ap 0 
 15:26:43:737 : halt ap 0 
 15:26:43:737 : Error: Mass erase operation failed.Please verify flash protection

And below CLI output is given

Please have a look and suggest us to resolve this.

Thanks

./STM32_Programmer_CLI -c port=swd -ob displ
 -------------------------------------------------------------------
 STM32CubeProgrammer v2.12.0 
 -------------------------------------------------------------------
 
ST-LINK SN : 0671FF313736504157192620
ST-LINK FW : V2J40M27
Board : NUCLEO-G070RB
Voltage : 3.23V
SWD freq : 4000 KHz
Connect mode: Normal
Reset mode : Software reset
Device ID : 0x460
Revision ID : Rev B
Device name : STM32G07x/STM32G08x
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0xB2
Debug in Low Power mode enabled
 
 
UPLOADING OPTION BYTES DATA ...
 
 Bank : 0x00
 Address : 0x40022020
 Size : 112 Bytes
 
[==================================================] 100% 
 
 
OPTION BYTES BANK: 0
 
 Read Out Protection:
 
 RDP : 0xAA (Level 0, no protection) 
 
 BOR Level:
 
 BOR_EN : 0x0 (Configurable brown out reset disabled, power-on reset defined by POR/PDR levels) 
 BORR_LEV : 0x0 (BOR rising level 1 with threshold around 2.1 V) 
 BORF_LEV : 0x0 (BOR falling level 1 with threshold around 2.0 V) 
 
 User Configuration:
 
 nRST_STOP : 0x1 (No reset generated when entering Stop mode) 
 nRST_STDBY : 0x1 (No reset generated when entering Standby mode) 
 nRST_SHDW : 0x1 (No reset generated when entering the Shutdown mode) 
 IWDG_SW : 0x1 (Software independant watchdog) 
 IWDG_STOP : 0x1 (IWDG counter active in stop mode) 
 IWDG_STDBY : 0x1 (IWDG counter active in standby mode) 
 WWDG_SW : 0x1 (Software window watchdog) 
 RAM_PARITY_CHECK: 0x1 (SRAM parity check disable) 
 nBOOT_SEL : 0x1 (BOOT0 signal is defined by nBOOT0 option bit) 
 nBOOT1 : 0x1 (Boot from Flash if BOOT0 = 0, otherwise system memory) 
 nBOOT0 : 0x1 (nBOOT0=1) 
 NRST_MODE : 0x3 (Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)) 
 IRHEN : 0x1 (Internal resets drives NRST pin low until it is seen as low level) 
 
 PCROP Protection:
 
 PCROP1A_STRT : 0xFF (0x801FE00) 
 PCROP1A_END : 0x0 (0x8000200) 
 PCROP_RDP : 0x0 (PCROP zone is kept when RDP is decreased) 
 PCROP1B_STRT : 0xFF (0x801FE00) 
 PCROP1B_END : 0x0 (0x8000200) 
 
 Write Protection:
 
 WRP1A_STRT : 0x0 (0x8000000) 
 WRP1A_END : 0x1F (0x800F800) 
 WRP1B_STRT : 0x3F (0x801F800) 
 WRP1B_END : 0x0 (0x8000000) 
 
 FLASH security:
 
 BOOT_LOCK : 0x0 (Boot based on the pad/option bit configuration) 
 SEC_SIZE : 0x20 (0x8010000)