X-CUBE-SBSFU: Compiler Optimization Impacts

[lsrbigfoot]

Section 6.1 of AN5056 (for X-CUBE-SBSFU) states that the projects are delivered with the highest level of compiler optimizations turned on for size aspects.

If the Optimization Level was set to 'None', then how much larger is the generated code expected to grow for the mapped regions (SE, SBSFU, etc.) excluding the image regions? (% increase in general)

Which of the regions will be impacted the most?

Update: To aid debug via IAR EWARM, I prefer to develop without any optimizations enabled, understanding that the code output size will be larger. I have no issues if the mappings are allowed to be adjusted to accommodate the larger code outputs.

[Bubbles]

Hi @lsrbigfoot ,

you didn't state for which particular example you need the sizes.

I could provide them when you say which image it is, but I think you can see for yourself. Simply build the binaries with the desired optimization option, without uploading them to the MCU and look at the map files the linker created for each particular binary.

Personally I'd probably debug the application standalone first, without the SB and SFU parts, for the basic functionality, so there should be not a lot of testing to be done for the integration of the whole FW.

BR,

J

[lsrbigfoot]

Fair enough. Thank you @Bubbles for the suggestion; I was asking ahead of time before I get there. There is one model (asymmetric authentication + symmetric exchanges) that will be evaluated prior to integration with data sessions for a user code design. I will inquire further depending on what I discover during evaluation.