STM32WL reset in debugger mode

[Ronik_123]

Hello All,

I am working on STM32WLE5 , and low power mode used for controller is stop 2 mode. And I am using MSI at 4Mhz  as system clock. When i enable debugger mode, controller takes reset after a while and reset type shown is also not correct. While controller is in stop 2 mode, 3 timers are running for the walk by purpose . I have gone through debug configurations and they are ok i think.

Can you please help, what might be the issue?

Thanks

[Ronik_123]

Hello community Members,

I have one more doubt on this-

I have make this DBG_WWDG_STOP high in  DBGMCU_APB1FZR1 register which means  WWDG is frozen while CPU is in debug mode but i am refreshing at some times.

Can this create problem ? Could this be the reason of reset or something else.

Waiting for fruitful response.

Thanks & Regards

Rohan Sharma

 

[Andrew Neil]

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@Ronik_123 wrote:

When i enable debugger mode, controller takes reset after a while

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Not sure what you mean by "enable debugger mode" or by "controller takes reset" ?

How long is "a while" - seconds? minutes? hours? days? is it repeatable?

Please provide some more detail - ideally, a minimum but complete example which illustrates the problem.

How to insert source code.

 

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@Ronik_123 wrote:

reset type shown is also not correct.

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Shown where?

What is shown?

What were you expecting?

 

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@Ronik_123 wrote:

 for the walk by purpose .

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Do you mean for stepping in the debugger?

 

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@Ronik_123 wrote:

I have gone through debug configurations and they are ok i think.

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You could post them for people to see & check?

[renziiiii]

Hi,

FYI, system configuration is as per below,

-> clock MSI 4 MHz, 

-> LPM enabled with stop 2 mode,

-> time base is RTC,

-> radio is used in FSK mode, walk-by* mode is enabled

-> WWDG is enabled

-> DEBUG mode is enabled

-> LPUART is enabled, clock source is LSE with wakeup on start bit

*walk-by means radio is sending data in every 15 seconds 

Now the problem statement is, we have seen reset during DEBUG mode enabled and this behavior is random. If we disable the DEBUG mode then there is no problem.

Reset reason is WWDG, but don't know why? FYI, DBG_WWDG_STOP is set i.e. WWDG should be disable in DEBUG mode.

 

Thanks & Regards

Piyush

[Ted THOMPSON]

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