Nucleo-H723ZG: PCLK frequency too high with CubeMX config

[mcozzi]

Hi all,

I am currently using the Nucleo-H723ZG and having difficulties with the clock management using version 1.12.1 of the stm32h7 cubeMx package.
The first symptom I encountered was that my USART2 baudrate was three times lower than expected. A few researches led me to posts where similar issues where described and supposed to be patched in 1.12.1 as in this post.

Digging a bit more on the subject, I noticed that HAL_RCC_GetPCLK1Freq(); and HAL_RCC_GetPCLK2Freq(); were both returning very strange values. Both functions output 429687488 which is way to high considering that STM32CubeMX caps the value at 137.5Mhz in the GUI. Following on this I got the following results:

HAL_RCC_GetHCLKFreq() -> 859374976

HAL_RCC_GetSysClockFreq() -> 1718749952

which doesn't look wright at all...

Am I missing anything here ? Is is possible that my stlink outputs a frequency above the standard 8MHz ?

I am pasting my SystemCLock_Config() fonction, in case I messed up something in it:

/**
 * @brief System Clock Configuration
 * @retval None
 */
void SystemClock_Config(void) {
 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

 /** Supply configuration update enable
 */
 HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);

 /** Configure the main internal regulator output voltage
 */
 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);

 while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {
 }

 /** Initializes the RCC Oscillators according to the specified parameters
 * in the RCC_OscInitTypeDef structure.
 */
 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 RCC_OscInitStruct.PLL.PLLM = 4;
 RCC_OscInitStruct.PLL.PLLN = 275;
 RCC_OscInitStruct.PLL.PLLP = 1;
 RCC_OscInitStruct.PLL.PLLQ = 4;
 RCC_OscInitStruct.PLL.PLLR = 2;
 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_1;
 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
 RCC_OscInitStruct.PLL.PLLFRACN = 0;
 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
 Error_Handler();
 }

 /** Initializes the CPU, AHB and APB buses clocks
 */
 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
 RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
 RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
 RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
 RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
 RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;

 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
 Error_Handler();
 }
}

 Thanks in advance for the help

[TDK]

Maybe your HSE_VALUE is set incorrectly. Check your clock configuration tab.

 

Include the IOC file that generates the problematic code.

[mcozzi]

Thank you for your answer.

I have modified the default macro in stm32h7xx_hal_conf.h from:
#define HSE_VALUE 25000000
to
#define HSE_VALUE 8000000

and it seems to fix the issue. 8 to 24MHz is roughly x3 so this would also explain the UART issue. Could it be possible that there is a macro definition missing from cubeMx generation ?

In the IOC file the RCC configuration seems correct: ```RCC.HSE_VALUE=8000000```
I have attached my IOC file to this message. 

[TDK]

If I generate code with your IOC file, it all looks as expected. HSE_VALUE is 8000000 within the stm32h7xx_hal_conf.h file. Perhaps you didn't regenerate code?

 

[mcozzi]

That's weird... In fact it's a value I never modified to begin with. But I did update my stm32h7 software package to 1.12.1, maybe I forgot to regenerate since, as you said. I'll investigate on my end.
Anyway the issue is solved, I'm marking the thread as resolved. 

Thanks for the help!