SMT32F7 or STM32H7 FMC SDRAM controller config documentation.

[MEdgerton]

I am using STM32F7 or STM32H7 to test SDRAM using FMC controller. Initially I could ot se a clock output. Seaching here has got that going.

I have tried theSTM32CubeIDE and even set SDRAM bank 2 the same as Bank1 after reading there may be an issue.

So far nothing. I stepped through and see a clock being anabled. It is mapped to PG8 on both H7 and F7 but I see not output there. I have tried various HCLK speeds with no joy.

I saw a message about needing static void BSP_SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command)

but I cannot find a reference to original documentaton so am using it from the github repository.

Also what is the 16-bit byte enable, I already have 16bit wide bus enabled. Thanks for help with this... I see it enles extra lines for how it writes but agin I cannot fd documentation about it. just a presentaion saying everything it can do, but not how to do it!

What simple thing am I missing? Most other things work through STM32CubeIDE.

Thanks,

Mark

[MEdgerton]

OK, So I got the clock going by tinkering with the call as it wasn't referencing the hsdram properly. I still need to know how to configure the setting and how this function should be written as it appears it should be generated automatically but isn't.

Side Note: what other devices are like this in cubeIDE or is it find out as you go?

Main think is to find out how this should be written and configured to a particular device as it appears to configure settings already setup and initialised but the CubeIDE code generator.

Many thanks,

Mark

[berendi]

Yes. CubeMX is a black box, you click some settings and it either works as you think it should work, or it does something else.

For more predictable results stick to the reference manual, there are step by step instructions for configuring each peripheral.

[MEdgerton]

Thank you. As elsewhere I have found it looks like PC2 (PC2_C) not switching fast enough. I hav manually set it to connect to PC2 but it doesnt work. PC3_C does switch fast though..... firmware issue with ST?

[MEdgerton]

I fund the reference and checked SYSCFG->PMCR to check that the bits were correctly set (low to enable interconnect between Pxy_C and Pxy. This is correct for PC3_C and PC2_C.

I can while dubggig toggle them. Both become disabled, as epected on the output, showing the interconnect works.

But PC2_C (PC2) remains too slow.

I have checked I am setting it to high speed and this appears to be the case.

Someone else must have experienced this when rigging up SDRAM or similar to a H743 especially on a Nucleo board?

[Tesla DeLorean]

Most people aren't wiring up SDRAM to NUCLEO boards, lot of pins involved, fussy about stubs, timing and pin skew, etc.

Likely to find more people have wired up SDIO/eMMC or QSPI devices.

The people I encounter tend to make a proto-board, or find a close proxy from WaveShare or the assorted vendors at AliExpress or Taobao, etc.

[MEdgerton]

Thanks for the answer. I actually have a nest of wires for SDRAM on a Nucleo-767. It works just fine. Memory tests all ok, removing a pin etc shows a fail as do other tests.

I then made a PCB board up for the Nucleo-H743.

So far I have uncovered that PC2_C on the 144 pin device actually doesn't work at full speed as per datasheet. PC3_C which is meant to be identical does work. So doing this is uncovering a few things.

I have therefor mapped it to another pin but its still not working......

The Waveshare etc is great for a quick prototype. Its still modular through 0.1" pins. Very similar to what I have made,

My memory board is similar but for a Nucleo board, Given the nest of wires works on the Nucelo-767 a PCB on the the H743 should be better.

I'm just looking for any gotchas (like the PC2_C issue above - now raised with ST as a case) with SDRAM on the H743. I have a genuine need for it, and other have done it like me on slower boards. I have backed the speed and settings to be identical but still nothing.

Does the waveshare have demo code as I think it uses a similar SDRAM?

I found this using very similar SDRAM to what I am using.....

Is there any test code for it anyone knows?

Thanks,

Mark

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