STM32h745 ADC+DMA in cortex M4 continuous in Busy state

[MDeva.1]

Hello,

I am working on STM32h745 controller. In cortex M4 I enable two ADC3 channels. Read the ADC value using DMA method. Only one time I get the ADC value after that it shows busy. Also I changes the sampling time, but no effect. But that ADC3 channels properly work in cortex M7 using DMA method.

Can you please help me.

[FBL]

Hello @MDeva.1​,

Based on your configuration, you need to configure SRAM4 to store peripheral input/output data in D3 domain.

[MDeva.1]

But how I can store in SRAM4, in Cortex M4 in flash.ld there is only one RAM

[FBL]

According to the reference manual, SRAM4 is the only RAM accessible by BDMA and ADC3.

I guess the linker for FLASH CM4 in IAR is correct. I will check the missing memory area in CM4 and get back to soon.