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Abhi_Data
Associate
October 17, 2023
Question

STM32L4xx:HAL_RCCEx_PeriphCLKConfig, PLL clock source and divider M already set

  • October 17, 2023
  • 4 replies
  • 2117 views

I am getting error in auto generated code. While doing Init for RNG peripheral at very first time just after flash  it's going in error loop and later upon reset, it is working fine. This behaviour I observed in debugging mode. 
What is the issue can you help?

 

 

 

2.PNG

Abhi_Data_0-1697612418186.png

 

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4 replies

TDK
Super User
October 17, 2023

What board is this? How is that function being called--what clock changes are being made? Doesn't appear to be RNG related.

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Abhi_Data
Abhi_DataAuthor
Associate
October 18, 2023

can you please review newly added attachments?

Technical Moderator
October 17, 2023

Hello @Abhi_Data 

Make sure that the RCC clock configuration settings are correct for your specific microcontroller and application.

Are you using external clock source? It would be helpful to provide MX configuration file (*.IOC)

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.Best regards,FBL
Abhi_Data
Abhi_DataAuthor
Associate
October 18, 2023

This is code is auto generated while I enabled RNG peripheral 
Added image of IOC file
please look again

waclawek.jan
Super User
October 17, 2023

The posted/highlighted code is not in HAL_RCCEx_PeriphCLKConfig, but in RCCEx_PLLSAI1_Config().

What is content PllSai1 and how is the PLL source set (i.e. what is content of RCC->PLLCFGR) at that moment?

Tell us more about your intended application and hardware.

JW

Abhi_Data
Abhi_DataAuthor
Associate
October 18, 2023

It's simple RNG application for the flash to test.
While doing inti for RNG ?it's going in error loop for very first time and after reset once it works fine

added Ioc image

Technical Moderator
October 18, 2023

Hi again @Abhi_Data 

Could you confirm the same issue using different clock source or decreasing clock frequency? According to the reference manual, RNG Clock source CLK48SEL is used to select 48MHz Clock. Are you sure about the MSI clock configuration being used?

You can try this example for reference:  STM32Cube\Repository\STM32Cube_FW_L4_V1.18.0\Projects\NUCLEO-L4P5ZG\Examples\RNG\RNG_Config

Note that you didn't provide further details about the product being used ...

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.Best regards,FBL