Calculating CLK dividers for MEMS microphones, SAI implemented through BSP for correct input audio
Hello,
I am using the BSP resources (stm32746g_discovery_audio) in order to get input audio from the MEMS digital microphones. The ingoing audio quality is good but it sounds like the signal itself is pitch-raised. Voices speaking sound like chipmunks. I have gathered that the audio input from SAI is dependent on dividing the clock frequency correctly, but I'm having a hard time finding resources for how to calculate the divisions. With ADC, the calculations are simpler with the sampling frequency relating to system clock frequency divided by periodlength.
How should I calculcate the clock division for SAI? My system clock frequency is 216MHz and target sampling frequency is 44.1kHz.
Thank you,
