Common SPI - LPS22HB pressure/temp sensor

[DuncanR]

Dear ST technical support.

Please can you advise the pin configuration and bus timing (period between active devices) to allow me to connect three of your LPS22HB pressure sensors in parallel on the same SPI bus?

The CS pin is used to enable the SPI function on one device but it is not clear if the other SPI pins can be common with other devices.

Thanks and regards

Duncan

[SMarie]

Here is how you should interface your sensors with your master device :

The SS pins are the CS. The master must have different CS pins for each slave. For the frequency, you can use any under 10 MHz.

For knowing when read the measures, you can first read the DRDY (Data-Ready) bit in the CTRL_REG3 register to know want new data are available.

You'll find everything you need in the documentation.

[DuncanR]

@SMarie Thank you for the quick response. This is connected as I expected from experience with most other devices. Regarding bus timing, I was not looking for clock speed but for the period of time necessary between the end of enabling one device, to the start of enabling the next. Perhaps this is in the documentation somewhere but I have been unable to find this.

Some SPI configurations require pull-up on the CS and/or other lines and some need bus isolation on MISO from what I have read. As I could not find specific parallel config information in the official ST documents, this is why I posted.

Many thanks

Duncan

[SMarie]

Yes, the lines require pull-ups because their idle state is high. So to address a chip, you'll need to drive its CS pin low.

About the time in between communicating with two chips, you need to make sure that you completely stop communication with the first one before starting with the next.

In the documentation, in part 3.3 Communication interface characteristics -> 3.3.1 SPI - serial peripheral interface, describing the SPI, you can see that the maximum time for the slave to stop communicating after the CS pin is drive back to high is 50ns (tdis(SO)). So if you really wanna be sure, you can wait for the minimum time you can as close as 50ns, but you can wait more if it is simpler for you (eg 1ms).

I hope I've answered your questions and that it will help you.

Sulian

[DuncanR]

Thanks again. So your initial schematic was not complete? I do need a pull up on each CS? If the idle state is high and not open circuit then I'm not sure I understand why the pull-up is needed if the line is driven high by the master which is controlling the CS?

Thanks for the 50nS hint I have now found that in the literature.

[SMarie]

Indeed, as your master is supposed to drive every CS pin in high state when not communicating to the slave, it will work as it.
The pull-up aren't mandatory, let's say it's more of a good practice.

[DuncanR]

Thanks, I think I am now in a good place. Thanks for your help  :thumbs_up: