H3LIS200DL interrupt threshold meaning

[honestech]

Hi, all.

I am trying to figure out H3LIS200DL interrupt issue. Even if I have set interrupt threshold to high value, I can't see any pulse on INTx line. Also not sure what the INT1_THS register describes. Datasheet shows only 7 bit value.

What I have done is as following.

/* initialized */
 
...
  
 if (h3lis200dl_device_id_get(h3lis200dl->ctx, &whoamI) != HAL_OK) {
 sprintf(pBuf, "Failed to get chip id\r\n");
 tx_com((uint8_t*)pBuf, strlen(pBuf));
 } 
 sprintf(pBuf, "Chip ID: %x \r\n", whoamI); 
 tx_com((uint8_t*)pBuf, strlen(pBuf));
  
 if (whoamI != H3LIS200DL_ID) { 
 sprintf(pBuf, "Couldn't get valid chip id\r\n"); 
 tx_com((uint8_t*)pBuf, strlen(pBuf)); 
 while (1) { 
 /* manage here device not found */ 
 }
}
 
 /* Configure filtering chain */
 /* Accelerometer - High Pass / Slope path */ 
 h3lis200dl_hp_path_set(h3lis200dl->ctx, H3LIS200DL_HP_DISABLE);
 
 h3lis200dl_pin_polarity_set(h3lis200dl->ctx, H3LIS200DL_ACTIVE_HIGH); 
 
 /* Set minimum event duration for free fall */ 
 h3lis200dl_int1_dur_set(h3lis200dl->ctx, 3);
 
 /* Apply free-fall axis threshold 
 * Set threshold to (350mg -> 22) 
 */ 
 h3lis200dl_int1_threshold_set(h3lis200dl->ctx, 127);
 
 /* Enable interrupt generation on free fall INT1 pin */ 
 h3lis200dl_int1_on_threshold_mode_set(h3lis200dl->ctx, 
 H3LIS200DL_INT1_ON_THRESHOLD_OR);
 
 h3lis200dl_int1_on_threshold_conf_get(h3lis200dl->ctx, &int_route);
 
 int_route.int1_xlie = PROPERTY_ENABLE; 
 int_route.int1_ylie = PROPERTY_ENABLE; 
 int_route.int1_zlie = PROPERTY_ENABLE; 
 h3lis200dl_int1_on_threshold_conf_set(h3lis200dl->ctx, int_route);
   
// h3lis200dl_int1_notification_set(h3lis200dl->ctx, H3LIS200DL_INT1_LATCHED);
 
 /* Set Output Data Rate */ 
 h3lis200dl_data_rate_set(h3lis200dl->ctx, H3LIS200DL_ODR_50Hz);
 
... 
 
/* reading operation to clear interrupt bit in INT1_SRC */

If AOI of INT1_CFG is OR, INT1 line is always active. Can you explain the INT1_THS meaning in detail?

Thanks in advance.

honestech

[Eleon BORLINI]

Hi honestech @honestech​ ,

>> Can you explain the INT1_THS meaning in detail?

The INT1_THS (32h) register content is the threshold level considering the selected FS (100g or 200g, since the H3LIS200DL is a high-g accelerometer), considering that the the LSB of this register in g/LSB is the FS/2^7, since there are 7 total bits. In the 100g case, you have 0.78g.

If you set a high threshold (for example 127 dec, i.e. the full scale), the probability to detect an interrupt are probably lower than if you have set a low threshold, since a small signal is more easy to generate to test if the interrupt is working.

If you want to detect the free fall -as it looks from the code you shared-, you just have to set the threshold = 1 (meaning that you'll detect a free fall if the device acceleration goes below 0.78g, which is < 1g. This conversion for this device is wrong "Set threshold to (350mg -> 22)"). But this device is not designed for the free-fall application, being the free fall below 1g acceleration...

>> If AOI of INT1_CFG is OR, INT1 line is always active. 

The OR configuration enables the detection of multiple, concurrent interrupts: if the INT1 is high, there might be another interrupt causing this rise, for example the data ready interrupt in the CTRL_REG3 register.

-Eleon