h3lis200dl power-down mode

[Olov H]

Posted on March 19, 2018 at 11:51

Hi,

we are facing a problem to shut down h3lis200dl in our design. VDD is connected to VDD_IO and power is always connected to 3V battery (even when device is turned off). We are using SPI-communication and reading/setting registers works fine. It is just that I can't achieve anything near 1uAmp power down mode current consumption as stated by the datasheet even if setting PM0-PM2 to 0 (i.e. register 0x20 to 0x07) to power down the unit. The unit keeps consuming around 50uAmps.

Any ideas what might be missing here? 

thanks

Olov

#h3lis200dl-power-down-mode

[Miroslav BATEK]

Posted on March 19, 2018 at 12:09

What is the voltage level on SDO pin when you measure the current consumption?

Can you share your schematic?

[Olov H]

Posted on March 19, 2018 at 14:28

Hi Miroslav, thanks for your response. in power-down mode I measure SDO=3V, SPC=0V, CS=3V, SDI=0V. Hope this helps! 

Some additional notes: Schematic connection of H3lis200dl is found in the first post. After measuring again the circuit actually consume about ~90uamps in power-down mode. Patched the board and released VDD_io (pin 1) on 

H3lis200dl to floating. Current consumption then decreased to ~50uamps..

We also have flash memory and ST IIS2DH accelerometer connected on same SPI-bus. Both of those circuits implement pull-up only on SDO and we have no problems with these two circuits only on the bus. Noted in H3LIS200DL datasheet that it has pull-ups on all of SDO, SPC, CS and SDI. Would you know what value these pull-ups use, maybe this could be the explanation?

[Miroslav BATEK]

Posted on March 20, 2018 at 17:40

The current consumption is caused by internal pull-up.

When no communication is ongoing, data on CS, SPC, SDI and SDO are driven by internal pull-up resistors.

The solution could be to ensure the high state (3V) at the data pins when there is no communication.

[EthanYao]

Hi Miroslav is there is away to disable the internal pull-up resistors?