Hi Eleon,
Thank you for your reply!
I've read both datasheet and app note but I still think the value mentioned there is wrong. Here's how i come to this conclusion:
Setup:
IIS3DWB Eval Kit connected to 180 MHz Cortex M4 MCU via SPI (4 wires) @ 10 MHz, both Interrupts connected
ODR 26,667 kHz, Timestamp active, DRDY Interrupt to INT1
First test:
Count the INT1 DRDY Pulses during 1 second - Result 26667 Pulses per Second +/- some ticks due to timing issues and maybe some clock errors (but very close to 26667 = no problem)
Second test:
Read the 32 bit timestamp value after each DRDY Pulse, Calculate the difference between the timestamp values after two consecutive DRDY Pulses - Result: The difference in timestamp values between two DRDY Pulses @ 26667 Hz ODR is 3 ticks
This leads me to the conclusion that the timestamp tick resolution is 12.5 us because between two consecutive DRDY Pulses @ 26667 Hz there must be 37.5 us, so 37.5 us / 3 ticks = 12.5 us / tick
25 us wouldn't make much sense simply because there would be 1.5 ticks between two samples and the tick value is an integer. So your IC designer would probably choose an integer value for the tick count between two samples.
If your datasheet is correct I guess I have another chip revision...
Best regards,
Martin