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Visitor II
March 17, 2021
Solved

High Pass filter on LSM6DS3?

  • March 17, 2021
  • 2 replies
  • 1255 views

Hi,

We are running a vibration analysis system based on the LSM6DS3. This is FIFO based, and everything works as expected. Application is accel only.

However when enabling the high pass filter from the digital composite filter, all readings out of the FIFO are 0. Data is still provided at expected intervals. Clearly the data has values ABOVE filter.

Should enabling the filtering not be as simple as writing the correct value to register CTRL8_XL?

something like (0x17, 0b00100100). We tried configuring before starting accel (0x10) and / or fifo (0x0A). Same result.

Many thanks for any input.

br

Christophe

    This topic has been closed for replies.
    Best answer by Eleon BORLINI

    Hi Christophe @CHuyg.1​ ,

    I see you have correctly enabled the HP_SLOPE_XL_EN bit of the CTRL8_XL register, selecting the 01b HPCF_XL [1:0] bits.

    The high-pass cut-off frequency should be about ODR_XL / 100, so it depends on the ODR you set (the higher the ODR, the higher the cut-off frequency).

    If it would be an issue related to the cut-off frequency, you could try setting 11b in the register, so that it will be reduced to ODR_XL/400 Hz.

    Please note also that, to enable the high-pass and low-pass digital filters, it is recommended to set to 1 the SLOPE_FDS bit and set to 0 the FUNC_EN bit, as reported in the AN4650 application note, p.28.

    Let me know if this can help you.

    -Eleon

    2 replies

    ST Employee
    March 17, 2021

    Hi Christophe @CHuyg.1​ ,

    I see you have correctly enabled the HP_SLOPE_XL_EN bit of the CTRL8_XL register, selecting the 01b HPCF_XL [1:0] bits.

    The high-pass cut-off frequency should be about ODR_XL / 100, so it depends on the ODR you set (the higher the ODR, the higher the cut-off frequency).

    If it would be an issue related to the cut-off frequency, you could try setting 11b in the register, so that it will be reduced to ODR_XL/400 Hz.

    Please note also that, to enable the high-pass and low-pass digital filters, it is recommended to set to 1 the SLOPE_FDS bit and set to 0 the FUNC_EN bit, as reported in the AN4650 application note, p.28.

    Let me know if this can help you.

    -Eleon

    CHuyg.1Author
    Visitor II
    March 18, 2021

    Thanks a lot, I entirely overlooked FUNC_EN and SLOPE_FDS, I thought that was the bit for the embedded registers, but it is a specific one to enable the filtering. All good now! Xtof