Hi @YSONG.1 ,
Let me check if I well understood: when you change the ODR from one value (for example 100Hz) to another (for example 200Hz), the master clock internal to the ASIC (both acc and gyro, that runs at a few MHz), will be divided accordingly (note that ODRs are multiples each of the others). So there is actually no blank step between the two ODRs
Then, if you write two times the same ODR, no changes will occur.
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-Eleon