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Visitor II
November 12, 2019
Solved

IIS2MDC single measurement current consumption

  • November 12, 2019
  • 1 reply
  • 860 views

Hi,

We notice IIS2MDC have single measurement mode which can be used for one shot operation. The datasheet also mention how to calculate current consumption for such mode.

However we can not find if the sensor will go sleep immediately after measurement, or will it sleep after available data is being read?

We might want to do something like this :

MCU trigger the measurement, MCU go to sleep, ignore/disable DRDY interrupt, MCU wake up 1 second later, MCU read IIS2MDC output register, MCU trigger measurement, ..... (looping); thus creating 1 Hz measurement interval

Will such scenario able to decrease current consumption to expected value from datasheet's current consumption equation (page 16)? Or will there any leak current since the data is not read immediately?

    This topic has been closed for replies.
    Best answer by Eleon BORLINI

    Hi @Dillah​ , as reported in the AN5080 p.11, the single measurement mode in IIS2MDC device work as follows:

    1. MCU writes the MD[1:0] bits to 01 in the CFG_REG_A register (with the speed of the chosen I2C/SPI)
    2. Magnetometer perform a measure and  Zyxda, zda, yda, xda bits of the STATUS_REG register are asserted (in  9.4 ms + 1/ODR or 6.4 ms + 1/ODR, depending on the selected power mode)
    3. The IIS2MDC is automatically (and immediately) configured in Idle mode by setting the MD[1:0] bits to 11.

    So the overall power consumption is limited to the step 2. If the min current cons in the case of LP and no offset canc is 25uA at 10Hz, if you work at 1Hz the average current cons will be /10, meaning 2.5uA for typ Vdd. Regards

    1 reply

    ST Employee
    November 27, 2019

    Hi @Dillah​ , as reported in the AN5080 p.11, the single measurement mode in IIS2MDC device work as follows:

    1. MCU writes the MD[1:0] bits to 01 in the CFG_REG_A register (with the speed of the chosen I2C/SPI)
    2. Magnetometer perform a measure and  Zyxda, zda, yda, xda bits of the STATUS_REG register are asserted (in  9.4 ms + 1/ODR or 6.4 ms + 1/ODR, depending on the selected power mode)
    3. The IIS2MDC is automatically (and immediately) configured in Idle mode by setting the MD[1:0] bits to 11.

    So the overall power consumption is limited to the step 2. If the min current cons in the case of LP and no offset canc is 25uA at 10Hz, if you work at 1Hz the average current cons will be /10, meaning 2.5uA for typ Vdd. Regards