LIS2DE12: help for configuring Stream to FIfo active on INT2

[AGran.3]

HI, I would like to use the LIS2DE12 to detect displacement (if someone moves my product from it starting place). As i should not be disturbed by vibration (workers, kick,…) I would like to do the detection in two steps :

1)     Use INT2 to detect small movement (with custom threshold and duration)

2)     Use STREAM to FIFO based on this ISR in order to soft process data in order to discard or not the event => I want to use INT1 to warm me when the FIFO is full

INT2 works fine but the STREAM to FIFO always generate interrupt (At the end of 32 frames reading, the interrupt INT1 rise UP even though INT2 don’t move…).

Can you help me to configure the device ?

My configuration is :

CTRL_REG1 = 0x4F

CTRL_REG2 = 0x07

CTRL_REG3 = 0x04

CTRL_REG4 = 0x00

CTRL_REG5 = 0x4B

CTRL_REG6 = 0x60

INT1_CFG = 0x7F

INT2_CFG = 0x6A

INT2_THS = 0x05

INT2_DURATION = 0x68

After I clear Interrupt by reading both INT1_SRC and INT2_SRC.

Finally I set FIFO_CTRL_REG = 0 (to reset fifo) and then FIFO_CTRL_REG = 0xDF (Enable Stream to FIFO mode)

INT1 should rise up only after INT2 active and FIFO overrun, but it is not the case and the interrupt INT1 is all time active.

Thanks for helping me

[Eleon BORLINI]

Hi @AGran.3​ ,

let me try to understand better the configuration... you would like to trigger the FIFO starting the acquisition after having detected the small movement (INT2 is raised), and then receive in the INT1 the signal that the FIFO is full, right? And after that, you clear both the interrupts.

In other words, you are basically following the configuration described in the datasheet p.22, am I right?

If so, you may have to configure FIFO_CTRL_REG (2Eh) register before starting the acquisition, with FM[1:0] = FIFO mode and TR=1, to be triggered by the INT2.

-Eleon

[AGran.3]

Hi, it's excatly what i want.

I try both in stream mode (FM and in stream to FIFO mode with TR=1 but I still have the same thing, INT1 is always asserted even thought the INT2 is still to 0.

I try to clear interrupt before and/or after setting fifo mode but I've got no change.I can't sync FIFO on INT2.

I also try to not activate INT2. In all cases INT1 is asserted at startup and after I read all the FIFO (plus time to fille FIFO at ODR time).

I don't undestand why.