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Visitor II
June 29, 2021
Question

Lis2dw12 - fifo read & write

  • June 29, 2021
  • 9 replies
  • 2779 views

HI :) , I want to exploit the option (if exists) to read the fifo buffer and write to it simultaneously .

meaning the device writes to the buffer and gets to the 11th sample (for ex.) , when I ask to read the data I will get the 0-11 samples and meanwhile the device will keep writing the 12th sample and on..

can I do it?

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    9 replies

    ST Employee
    July 1, 2021

    Hi @Msaga.1​ ,

    Let me check if I well understood your question: you should be able to do it by setting the device in Continuous mode, as described in the AN5038 application note, p.39.

    In this mode, the FIFO should continuously fill (you can set a defined watermark), while the external user can query the FIFO with the standard I2C/SPI interface.

    The FIFO meanwhile keep on filling.

    Did I understand well your question?

    -Eleon

    Msaga.1Author
    Visitor II
    July 1, 2021

    if I will set my device in continues mode how will i know that i am reading all of my data correctly?

    for example:

    can there be an option that i write the data, full 32 samples are filled and when i wan to read it , already the 1st sample changed (overwritten) - meaning i will lose data - opposite to what i want to gain (which is never losing data , the reason to read & write simultaneously)

    Msaga.1Author
    Visitor II
    July 13, 2021

    @Eleon BORLINI​ , I would like your answer

    ST Employee
    July 13, 2021

    Hi @Msaga.1​ ,

    continuous mode works if you are able to synchronize well the reading from the FIFO with the writing in the FIFO, with SPI speed much higher than ODR frequency, which is the rate at which FIFO fills (according for example to Table 28 of AN5038 application note.

    If you want to read a batch of 10 samples (say from t=1 to t=10), and keep on the FIFO filling, and then read another batch of 10 samples, and so on, being sure you are collecting batches of consecutive samples, than you should use the FIFO mode with the proper FIFO threshold: when this level is reached, you can start depleting FIFO with SPI (faster than ODR). If you want to reset FIFO content, you can use the Bypass mode, that clears the buffer; then write again the FIFO Mode bit, so the reading can restart from when it was interrupted. If the reading phase is sufficiently fast (less than 1/ODR), you shouldn't lose consecutive samples.

    But I would suggest you to use the Continuous mode with a fast FIFO reading phase.

    0693W00000BdZXbQAN.png-Eleon

    Msaga.1Author
    Visitor II
    July 14, 2021

    Hi @Eleon BORLINI​ ,

    so if I understand correctly, if I have ODR 12.5 meaning that every 0.08 second I am getting a new sample, what is the FIFO threshold I need to use?

    >>If you want to reset FIFO content, you can use the Bypass mode, that clears the buffer; \

    What did you mean here?

    If I will read 10 samples (for example) while the other samples are filling the FIFO, and I will use Bypass mode, will in not delete all of the FIFO content (what I have read and what have been filed since then?

    >>then write again the FIFO Mode bit, so the reading can restart from when it was interrupted .

    how will it insure that the reading will start from the same place? (if I am deleting all data by Bypass mode that is)?

    >>But I would suggest you to use the Continuous mode with a fast FIFO reading phase.

    That is what I want to do, how do I influence the reading speed?

    Thank you,

    Maya

    ST Employee
    July 21, 2021

    Hi Maya,

    the FIFO threshold is measured in number of samples, so you don't mind the actual 1/ODR period. However, it can be important if you want to compare the SPI frequency speed and the ODR, and use the SPI to rapidly acquire the FIFO buffer, so that you can be faster than 1/ODR and you don't miss samples.

    If you activate Bypass mode, the FIFO is not operational: buffer content is cleared, output registers (0x28 to 0x2D) are frozen at the last value loaded, and the FIFO buffer remains empty until another mode is selected (App note p.38).

    >> how will it insure that the reading will start from the same place?

    If SPI is much faster that ODR (e.g. 10MHz compared with 12.5Hz), you will be confident that the reading of the buffer will occur before the next FIFO data is written.

    >> That is what I want to do, how do I influence the reading speed?

    You can do it by changing the SPI frequency.

    -Eleon

    Msaga.1Author
    Visitor II
    July 22, 2021

    Hi @Eleon BORLINI​ , thank you

    how can I change the SPI frequency?

    ST Employee
    July 22, 2021

    Hi @Msaga.1 (Community Member)​ ,

    for the SPI frequency change you have to configure it from your application processor.

    Which SPI master are you using?

    -Eleon

    Msaga.1Author
    Visitor II
    July 25, 2021

    do you mean my pc?

    ST Employee
    July 26, 2021

    Yes, your SPI master. You should be able to change the communication frequency increasing it up to 10MHz.

    If you read 32 data with that speed, the reading will take 32*16 bit *1/10MHz = 50 us << 1/12.5Hz = 80ms which is the speed of your ODR / FIFO filling rate.

    -Eleon