LIS3DH Address Changes Post-Config

[jrgert]

I am using a LIS3DH breakout board that is exhibiting weird behavior. My I2C master is a STM32L496 board that has been tested OK with other I2C chips.

Startup

1. I2C init to 400 KHz
2. Scan all possible addresses via HAL_I2C_IsDeviceReady() loop
3. Remember address
4. Read WHO_AM_I register
5. If it's an LIS3DH, Write config registers

If I write 0x00 into CTRL_REG0, the next write or read is NACK'd.

If I reset the MCU, the reported address from step 3 changes to 0x10. (thus the NACK)

So, on power cycle, the address from step 3 is 0x30 and post-config the chip NACK's 0x30.

On MCU reset, the address from step 3 is 0x10 and everything works OK.

I believe writing 0x00 to CTRL_REG0 is the root cause. It seems like undocumented behavior.

Anyone else see this issue?

[TBomb.1]

Hi, you wrote:

I believe writing 0x00 to CTRL_REG0 is the root cause. It seems like undocumented behavior.

Datasheet suggests to leave bits 0 through 6 of the CTRL_REG0 at the default value in order to ensure correct operation of the device.

Moreover, if you change the value of SDO_PU_DISC bit, the SDO/SA0 pull-up disconnects and this directly affects the I2C slave address value, as reported in the datasheet p.25:

The SDO/SA0 pad can be used to modify the less significant bit of the device address. If the SA0 pad is connected to the voltage supply, LSb is ‘1’ (address 0011001b) else if SA0 pad is connected to ground, the LSb value is ‘0’ (address 0011000b). This solution permits to connect and address two different accelerometers to the same I2C lines.

https://www.st.com/resource/en/datasheet/cd00274221.pdf

So you should not write that register, if not for a precise purpose.

Tom

[jrgert]

Yes, thank you for replying. I realized the CTRL_REG0 issue that evening driving to the restaurant, however, I had such a good time I forgot to post that I was being negligent of the datasheet.