LSM6DS3 FIFO Status/FTH for Continuous to FIFO

[SS13]

I am trying to configure a LSM6DS3 to capture Tap events in the FIFO similar to how Unico does. 

i.e. I press "Continuous to FIFO" button (to enable a new capture), then tap the sensor, and the acceleration of the tap event appears on the screen (after being read from the FIFO).

I used Unico to derive my configuration. It is here in csv format:

Addr,Name,Value (hex), comment

10,CTRL1_XL,60,ORD==416Hz

06,FIFO_CTRL1,60,FIFO Threshold, FTH == 96 words, 32 samples, 3 (x,y,z) axis

07,FIFO_CTRL2,00,

08,FIFO_CTRL3,01,accelerometer, no decimation

09,FIFO_CTRL4,00,

0A,FIFO_CTRL5,33,FIFO ODR==416Hz, Continuous-to-FIFO

5F,MD2_CFG,40,Note: AN5040 - Rev 3 "8.2.4 Continuous-to-FIFO mode", "Single tap: event detection has to be configured and the INT2_SINGLE_TAP bit of the MD2_CFG register has to be set to 1;"

13,CTRL4_C,00, STOP_ON_FTH==0 (configuration A)

13,CTRL4_C,01, STOP_ON_FTH==1 (configuration B)

With this configuration I expect that the FIFO will contain:

 * 32 accelerometer samples for each axis

 * contain the Tap Event

 * the timeframe immediately before the Tap Event. 

  

I tried two different configurations (A and B)to achieve this by changing CTRL4_C, STOP_ON_FTH.

Note: I know that the Tap Event is working because I rout it to INT1, and use this to trigger the FIFO read.

---------------------------------------

Test 1, Configuration A (STOP_ON_FTH==0)

In configuration A, I think the FIFO is filling beyond the FTH. When I read the first FTH the data doesn't contain the tap event as if the FIFO is longer than FTH.

When I read FIFO status I see:

 Addr,Name,Value (hex), comment

 3A,FIFO_STATUS1,00,DIFF_FIFO_[7:0]

 3B,FIFO_STATUS2,E0,DIFF_FIFO_[11:8], FTH == 1, FIFO_OVER_RUN == 1,FIFO_FULL == 1,FIFO_EMPTY == 0

  

Why is this indicating there are 0 unread bytes?

---------------------------------------

Test 2, Configuration B (STOP_ON_FTH==0)

In configuration B, I think the FIFO is filling as soon as it is enabled, and then stopping upon sample STOP_ON_FTH. Obviously, this will not capture the Tap Event.

When I read FIFO status I see:

 Addr,Name,Value (hex), comment

 3A,FIFO_STATUS1,60,DIFF_FIFO_[7:0]

 3B,FIFO_STATUS2,E0,DIFF_FIFO_[11:8], FTH == 1, FIFO_OVER_RUN == 1,FIFO_FULL == 1,FIFO_EMPTY == 0

I think FIFO_STATUS values make sense, but as described above the Tap Event isn't contained in the 0x60 words read. 

---------------------------------------

It is difficult to decipher if Continuous-to-FIFO mode ever triggering FIFO mode to capture the Tap Event, or is the data I read the Streaming/Continuous (current) acceleration.

Why would Configuration A cause 0 unread bytes?

Is STOP_ON_FTH causing the FIFO to stop capturing new data as soon as Continuous-to-FIFO and 32 words are read?

Is the behavior I want possible? Can I limit the number of FIFO bytes to read in Continuous-to-FIFO mode by setting FTH?

[Eleon BORLINI]

Hi @SS13​ ,

So, basically the Tap event is not captured by the FIFO data, am I right?

Did you check you code with the Github C examples such as lsm6ds3_fifo_stream_to_fifo.c and lsm6ds3_multi_read_fifo.c?

In any case, I think you have first to configure the Tap event, in tersm of threshold and duration (you can find a C sample code always on Github --> lsm6ds3_tap_single.c), or in the AN5040 application note, p.42.

/* Set Tap threshold to 01001b, therefore the tap threshold is
 * 562.5 mg (= 9 * FS_XL / 2 5 )
 */
 lsm6ds3_tap_threshold_set(&dev_ctx, 0x09);
/* Configure Single Tap parameter
 *
 * The SHOCK field of the INT_DUR2 register is set to 10b: an
 * interrupt is generated when the slope data exceeds the programmed
 * threshold, and returns below it within 38.5 ms (= 2 * 8 / ODR_XL)
 * corresponding to the Shock time window.
 *
 * The QUIET field of the INT_DUR2 register is set to 01b: since the
 * latch mode is disabled, the interrupt is kept high for the duration
 * of the Quiet window, therefore 9.6 ms (= 1 * 4 / ODR_XL.)
 *
 * DUR already set to 0 after reset
 */
 
 lsm6ds3_tap_quiet_set(&dev_ctx, 1);
 lsm6ds3_tap_shock_set(&dev_ctx, 2);
 /* Enable Single Tap detection only */
 lsm6ds3_tap_mode_set(&dev_ctx, LSM6DS3_SINGLE_DOUBLE);

Please let me know if this can be of some help for you.

-Eleon

[SS13]

Regarding:

 "So, basically the Tap event is not captured by the FIFO data, am I right?"

 ... This is correct. I found that the behavior I see is described in the App Note here.

<Snip AN4650>-------------------------------------------------------------------------------------

 8.2.4 Continuous-to-FIFO mode

 Continuous-to-FIFO mode is sensitive to the level of the interrupt signal and not to the edge, which means that if Continuous-to-FIFO is in FIFO mode and the interrupt condition

 disappears, the FIFO buffer returns to Continuous mode. It is recommended to latch the interrupt signal used as the FIFO event in order to avoid losing interrupt events (the interrupt

 signal has to be driven to the interrupt pin so that the latch function takes effect).

 </Snip AN4650>------------------------------------------------------------------------------------

Regarding:

 "Did you check you code with the Github C examples such as lsm6ds3_fifo_stream_to_fifo.c and lsm6ds3_multi_read_fifo.c?"

... I am using the code you referenced.  

 It seems that, if I want to have unlatched interrupt (which I do), I'll need to adjust how I read the FIFO. I am considering using ISR on the falling edge of INT to guarantee the capture of the Tap Event.

[Eleon BORLINI]

Hi @SS13​ ,

>>  It seems that, if I want to have unlatched interrupt (which I do), I'll need to adjust how I read the FIFO. I am considering using ISR on the falling edge of INT to guarantee the capture of the Tap Event.

Is this strategy working?

-Eleon

[SS13]

I haven't implemented this yet, but I don't see why there would be an issue. The only reason I originally tried to avoid this was the added complexity of adding a interrupt, and ISR. This is not a critical issue to me.

[Eleon BORLINI]

Hi @SS13​ ,

please keep us updated in case of any progress.

-Eleon

[L77d]

Hi,

I am using steval MKI160V1 coupled with pybv1.0 under microphyton (spi speed 525000bits/s).

I'd like to get every samples from gyro and accel at 1666 hertz speed using interruption.

I have configured lsm6ds3( whoami = 69h) to do so, but while I am flushing every samples reading fifo_status1 n 2 registers to know the entire of unread words in fifo, there sometimes a "rebound like" of interruption coming next to the previous one !

Why is the documentation saying (page 31/112 5.4.3. continuous mode) that it is possible to route FIFO_STATUS2 (3Bh) (FTH) to the INT1 pin by writing in register INT1_CTRL (0Dh) (INT1_FTH) = ‘1

FIFO_STATUS2 is only one byte long while FTH can contain size of 2^12 words of data ?

I am not sure of the correct use of FTH neither interruption for this project ?

To have a better look at what appends I have reduced odr to 26hertz...

Thx for your help

 

 

 

[L77d]

I have set INT2 to be active if Fifo is full.

When Py Board line rise the irq then I decide to read FIFO Status Registers to know how much data are available in FIFO...that might be 0 and flags of fifo full set but absolutly not !!!

INT2 rises while registers says that there are 3836 words in FIFO and FIFO_STATUS2 (3Bh) most quartet is 10d so that FTH bit and FIFO_FULL bit are sets !!!!!

How is that possible ?