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Explorer II
June 27, 2023
Question

LSM6DSL FIFO threshold Interrupt

  • June 27, 2023
  • 3 replies
  • 2085 views

Did anyone have success configuring the LSM6DSL to use FIFO and threshold to trigger the interrupt pin?

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    3 replies

    Technical Moderator
    June 27, 2023

    Ciao @MLuis.1 ,

    Have you already looked at our example on Github? LSM6DSM FIFO works as LSM6DSL one so you can adapt this code to your case.

    To set the threshold, you need to write the bits FTH_[10:0] in the FIFO_CTRL1 and FIFO_CTRL2 registers that contain the threshold level and then write in the register INT1_CTRL = 0x08 to route signal on INT1 pin and enable gyroscope and accelerometer in FIFO writing to FIFO_CTRL3 register.

    If this helps you, please mark my answer as "Best Answer" by clicking on the "Accept as Solution" button, this can be helpful for Community users to find this solution faster.

    MLuis.1Author
    Explorer II
    June 28, 2023

    Hi @Federica Bossi ,

    I tried following the same sequence as the code in the github_example you suggested with no success.
    I have my code working using X_DRDY on Int1 and I'm able to get both the accelerometer and gyroscope raw values.
    It seems that only when trying to use the FIFO functionalities it doesn't work. I checked the number of FIFO entries; it is always at 0, and the threshold status flag is also off.
    When using the FIFO functionalities if I read the raw data registers they are still being updated even though the FIFO remains empty.

    Technical Moderator
    June 29, 2023

    Hi @MLuis.1 ,

    Can you share the values of registers: 0Dh,06h,07h and 08h?

    Thanks

    Technical Moderator
    July 3, 2023

    Hi @MLuis.1 ,

    These registers are correctly set. Can you share with me the other writings you are doing? If there are...

    MLuis.1Author
    Explorer II
    July 4, 2023

    @Federica Bossi , when I what to acquire, I write the desired ODR on the gyroscope, accelerometer and FIFO registers. I'm using the same ODR value for all three.