LSM6DSO Single + Double tap (LIR bit = 1) => Only single tap interrupt.

[F_G]

According to AN5192 (last paragraph of page 50) if LIR is enabled (0x56:0x4F)  and SINGLE_DOUBLE_TAP is set (0x5B:0x80) "latched mode is applied to the double-tap interrupt signal only".

But I only read single tap in TAP_SRC (0x1C:0x20) during ISR.

As soon as I disable LIR I get both interrupts.

Is there an error in AN5192 and only single tap will be signalled when LIR = 1?

Or I made a mistake somewhere in the registers?

Here is my register dump:

# i2cdump -yf 1 0x6a
 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 00 00 3f 00 00 00 00 00 00 00 40 00 00 08 00 6c ..?.......@..?.l
10: 60 28 44 08 60 00 00 00 e2 20 02 0f 00 20 07 28 `(D?`...? ??. ?(
20: b3 01 0d 00 ee ff f5 ff b2 01 23 00 63 41 00 00 ???.?.?.??#.cA..
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40: cd 05 20 00 f3 05 20 00 00 04 00 00 00 00 00 00 ?? .?? ..?......
50: 00 00 00 00 00 00 4f 06 86 06 8a 80 00 00 4a 00 ......O?????..J.
60: 00 00 00 fd aa 01 00 00 00 1a 21 21 40 06 00 00 ...???...?!!@?..
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

 

 

[Federica Bossi]

Hi @F_G ,

You probably have both single and double interrupts active, but when you read TAP_SRC on the single interrupt it actually resets the algorithm, so the next one will be detected as single again and not double.

If you are only interested in double tap, just remove the interrupt from single, otherwise, if you want both, you can use the pulsed mode.

[F_G]

Hi, @Federica Bossi,

Yes I have both interrupt active.

By pulse mode you mean LIR=0?

I understand your explanation but that is not what AN5192 is saying:

"Single and double-tap recognition works independently."

...

"If latched mode is enabled and the interrupt signal is driven to the interrupt pins, the value assigned to SINGLE_DOUBLE_TAP also affects the behavior of the interrupt signal. When it is set to 0, latched mode is applied to the single-tap interrupt signal; when it is set to 1, latched mode is applied to the double-tap interrupt signal only."

My interpretation of these statements is that I would have expected to have only double tap interrupts latched if LIR=1. And I was hoping to have unlatched single tap in TAP_SRC too.

 

I have set LIR=0 in my application to have both and it works. If an interrupt is missed because cleared before TAP_SRC is read, I guess the user can always repeat the command. ( it's a bad user experience, but I don't have much choice, do I? )
I think it would help to clarify AN5192.

Thanks.

[Federica Bossi]

Hi @F_G ,

 

You are right, I have already asked to the team to change that statement in the next release because it is confusing.

I confirm you that with both the interrupts active it can't be done. You need to set LIR=0.