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October 28, 2020
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lsm6dsox read data in polling mode

  • October 28, 2020
  • 1 reply
  • 865 views

Hello, support team.

​

In my project, I want to read acceleration and angular rate from lsm6dsox as fast as possible.

In polling mode example, lsm6dsox_xl_flag_data_ready_get function is called before lsm6dsox_acceleration_raw_get.

To faster the procedure, I consider skipping lsm6dsox_xl_flag_data_ready_get and just reading raw data via lsm6dsox_acceleration_raw_get.

​

Is it okay to read data without checking read state?

​

In addition to above question, There is one more question.

I set ODR of both acceleration and angular to 1667Hz.

I2C clock is 400kHz.

Acceleration and angular rate are read in polling mode without checking ready state.

It looks like new data is read out faster than 1667Hz.

Am not sure it is fine.

Do you have any idea for this phenomenon?

    This topic has been closed for replies.
    Best answer by Eleon BORLINI

    Hi @Community member​ ,

    >> Is it okay to read data without checking read state?

    How faster are you reading the data, with respect to the nominal ODR 1.667kHz? By the way, if you are using this example lsm6dsox_read_data_polling.c it should be fairly safe to skip the data-ready check, since you have enabled the BDU and the data are blocked till the internal logic has elaborated a new sample. So, if the data is varying at the output, it means that the internal logic has updated the data.

    >> Do you have any idea for this phenomenon?

    It could be related to the fact that the nominal ODR is 1.667kHz, but the actual ODR can vary from this value, typically of +-4% at ODR=1.667kHz, ranging from 1.6kHz to 1.73kHz. However, to check this you can enable the data-ready DRDY interrupt on an interrupt pin, for example on INT1 pin (lsm6dsox_read_data_int.c)

    About how to make the acquisition faster, you could run in FIFO more: while you are filling the FIFO, you read batches of samples together. There is an example on Github, from which you could take inspiration, the lsm6dsox_fifo.c

    -Eleon

    1 reply

    E
    Eleon BORLINIAnswer
    ST Employee
    October 29, 2020

    Hi @Community member​ ,

    >> Is it okay to read data without checking read state?

    How faster are you reading the data, with respect to the nominal ODR 1.667kHz? By the way, if you are using this example lsm6dsox_read_data_polling.c it should be fairly safe to skip the data-ready check, since you have enabled the BDU and the data are blocked till the internal logic has elaborated a new sample. So, if the data is varying at the output, it means that the internal logic has updated the data.

    >> Do you have any idea for this phenomenon?

    It could be related to the fact that the nominal ODR is 1.667kHz, but the actual ODR can vary from this value, typically of +-4% at ODR=1.667kHz, ranging from 1.6kHz to 1.73kHz. However, to check this you can enable the data-ready DRDY interrupt on an interrupt pin, for example on INT1 pin (lsm6dsox_read_data_int.c)

    About how to make the acquisition faster, you could run in FIFO more: while you are filling the FIFO, you read batches of samples together. There is an example on Github, from which you could take inspiration, the lsm6dsox_fifo.c

    -Eleon

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