LSM6DSOX SPI ack

[gabriel.arnautu]

Hi,

I am using an LSM6DSOX in SPI mode. I prefer SPI over I2C because it has bigger data transfer rates. Is there any way to be sure that my SPI commands were executed with success? Are they returning something? For example, how can I be sure of the integrity of the data received from FIFO?

[Eleon BORLINI]

Hi @gabriel.arnautu​ , sorry for the late answer... Did you succeed in setting up the SPI communication? Please note that SPI has no "ack" in the sense of the I2C, but you can be sure you are reading well the DSOX checking the WHO_AM_I register: when the master sends 0F, the slave sends back 6C. Please check the datasheet, p.20. Regards

[gabriel.arnautu]

Hi @Eleon BORLINI​ , yes, I am doing the 0F -> 6C sequence, but I would like to make sure that the communication doesn't fail while I am reading the FIFO for example.

Regards

[Eleon BORLINI]

On LSM6DSOX there is unfortunately no CRC to automatically check the parity. An empirical way to validate the SPI communication can be compare two consecutive FIFO samples: if they are identical and/or equals to FF, there has been a (temporary) fail in the sample integrity. Regards