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Visitor II
February 20, 2019
Question

LSM9DS1 accelerometer interrupt threshold register

  • February 20, 2019
  • 4 replies
  • 1474 views

In the LSM9DS1, what is the relationship between the interrupt threshold register INT_GEN_CFG_XL (8 bits) and the output register OUT_X_XL (16 bits)?

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    4 replies

    ST Employee
    February 20, 2019

    Hi Damon, for e.g. FS +-2g, the INT_GEN_THS_X_XL is unsigned on 8bit on 2g (the sign and the axis of threshold interrupts is configurable in the INT_GEN_CFG_XL register), meaning that the threshold LSB is 2g/2^8 = 3.9mg/LSB.

    The OUT_X_XL (16 bits) is signed on 16 bits, meaning an LSB of 4g/2^15 = 0.061mg/LSB.

    This means you have a minimum threshold that is higher than the output LSB

    Visitor II
    April 18, 2019

    Hi Eleon, if the INT_GEN_THS_X_XL register is unsigned 8-bit full scale, then for FS +-2g wouldn't the threshold LSB be 2g/2^8 = 7.8mg/LSB, not 3.9 as you calculated?

    The datasheet is not clear about this, but assuming you have +-16g full scale and want to trigger the interrupt when the Z-axis rises above 4g in either direction, e.g. is in the range +4g to +16g or in the range -4g to -16g, then you would set INT_GEN_THS_Z_XL to 64: 16g/2^8 = 62.5mg/LSB; thus 4000 / 62.5 = 64. You would also set INT_GEN_CFG_XL:ZHIE_XL to 1.

    My understanding is that the module discards the sign and compares the 15-bit OUT_Z_XL value with the 8-bit threshold (e.g. by shifting left 7 bits). Your calculations seem to indicate that, for e.g. FS +-2g, the maximum possible measurement range is -1g to +1g, thus unsigned 8-bit 1g/2^8 = 3.9mg/LSB. Can you clarify this please?

    ST Employee
    April 18, 2019

    HI Simon, you may be right: the low event detection means rising an interrupt when the data goes below the threshold, not necessarily negative. But let me please check the correctness of this sequences. Regards

    Visitor II
    February 26, 2019

    Thanks for the response.

    So you can set interrupts on +(INT_GEN_THS_X_XL) and -(INT_GEN_THS_X_XL) individually?

    ST Employee
    February 28, 2019

    HI Damon, yes, by configuring bits XHIE_XL (for the high threshold, positive direction) and XLIE_XL (for the low threshold, negative direction) in the reg INT_GEN_CFG_XL. Regards

    Visitor II
    March 1, 2019

    OK, I understand. Thank you.