re: ISM330DLC / LSM6DSM - reading FIFO

[CHarr.1]

I need some help please re ISM330DLC – extracting data using FIFO_DATA_OUT_H and FIFO_DATA_OUT_L as described in AN5125 section 8.5.1.

I don’t fully understand table 85. Where does the FIFO_PATTERN_[9:0] come from?

How is the association between Next reading from FIFO output registers and FIFO_PATTERN set up?

What are the detailed steps required to read the sequence of 16bit words Gx Gy Gz XLx XLy XLz?

 Thank you for your help!

[Eleon BORLINI]

Hi @CHarr.1​ , the FIFO_PATTERN_[9:0] is explained in the ISM330DLC datasheet p.70: it is a status register and is the content of the FIFO_STATUS3 (3Ch) and FIFO_STATUS4 (3Dh) FIFO status control registers (r). When you read this pattern, depending on the written value you can understand which will be the next reading from FIFO output registers. Please note that for a proper read of the register, it is recommended to set the BDU bit in CTRL3_C (12h) to 1. 

I suggest you to check the C-code examples available on Github for the FIFO data reading for LSM6DSM device (lsm6dsm_fifo_stream_to_fifo.c, lsm6dsm_read_fifo.c and lsm6dsm_read_fifo_simple.c). For example, some basic setting are the following ones:

/* Set FIFO watermark to a multiple of a pattern
 * in this example we set watermark to 10 pattern
 * which means ten sequence of:
 * (GYRO + XL) = 12 bytes
 */
 pattern_len = 12;
 lsm6dsm_fifo_watermark_set(&dev_ctx, 10 * pattern_len);
 
 /* Set FIFO mode to Stream mode */
 lsm6dsm_fifo_mode_set(&dev_ctx, LSM6DSM_STREAM_MODE);
 
 /* Enable FIFO watermark interrupt generation on INT1 pin */
 lsm6dsm_pin_int1_route_get(&dev_ctx, &int_1_reg);
 int_1_reg.int1_fth = PROPERTY_ENABLE;
 lsm6dsm_pin_int1_route_set(&dev_ctx, int_1_reg);
 
 /* FIFO watermark interrupt on INT2 pin */
 //lsm6dsm_pin_int2_route_get(&dev_ctx, &int_2_reg);
 //int_2_reg.int2_fth = PROPERTY_ENABLE;
 //lsm6dsm_pin_int2_route_set(&dev_ctx, int_2_reg);
 
 /* Set FIFO sensor decimator */
 lsm6dsm_fifo_xl_batch_set(&dev_ctx, LSM6DSM_FIFO_XL_NO_DEC);
 lsm6dsm_fifo_gy_batch_set(&dev_ctx, LSM6DSM_FIFO_GY_NO_DEC);
 
 /* Set ODR FIFO */
 lsm6dsm_fifo_data_rate_set(&dev_ctx, LSM6DSM_FIFO_52Hz);
 
 /* Set XL and Gyro Output Data Rate:
 * in this example we set 52 Hz for Accelerometer and
 * 52 Hz for Gyroscope
 */
 lsm6dsm_xl_data_rate_set(&dev_ctx, LSM6DSM_XL_ODR_52Hz);
 lsm6dsm_gy_data_rate_set(&dev_ctx, LSM6DSM_GY_ODR_52Hz);

Regards

[CHarr.1]

Thank you for your prompt answer