Simultaneous Wake-Up/6D Events

[RHood]

Posted on February 21, 2018 at 02:36

Simultaneous Wake-Up/6D Events

I have a similar problem to

https://community.st.com/thread/42585-lis2ds12-does-wake-up-interrupt-block-other-interrupts

reported by

https://community.st.com/people/ben.005

.I want an LIS2DW12 to do detect bothwake-up and 6D change events. I can afford only 1 gpio pin for interrupts; it's tied to INT1. When I enable wake-up and 6Dseparately I get appropriate interrupts and can detect both kinds of event. However, when I enable both at the same time I don'tsee the 6D event; more specifically, the 6D-IA bit in the SIXD_SRC (3Ah) register is never set and the WU_IA bit in the WAKE_UP_SRC (38h) register is always set.

Now this makes a certain amount of sense since changing orientation also requires motion. Also, there is an importantexception to this behavior. If I

slowly

rotatethe device into a new orientation to avoid exceeding the wake up threshold, I do see the 6D_IA bit and not the WU_IA bit. Oninterrupt, I initiate an SPI read of the status registers from address 37h through3Bh; this read is generally completed in under 35 microseconds from the active edge ofINT1.

Does my status readblock the 6D event before it can be reported? If not, canI delay reading the status registers or perhaps read them again later for 6D detection?

The LIS2DW12is configured as follows(reg - value)

20 - 11

21 - 1E

22 - 0A

23 - A0

30 - 40

34 - 04

3F - A0

Thanks in advance for any insights on this.

[Miroslav BATEK]

Posted on February 21, 2018 at 10:28

Please try to enable Latched interrupt by setting LIR bit in CTRL3 register.

If you do that the status bits remain set until you read appropriate status register.

[RHood]

Posted on March 12, 2018 at 21:21

Hi Miroslav,

Thank you for the suggestion. I set register 22h to 1A but it did not make a difference in the 6D_IA bit. Fortunately the problem isamenable to a simple work around. Following configuration, I used thefollowing sequence issued to clear interrupts:

Time MOSIMISO Comment

1.4217071 0xB7 0xFF Sequential read of 5 status regs starting with STATUS_DUP

1.4217084 0x00 0x41

1.4217098 0x00 0x0F

1.4217111 0x00 0x00

1.4217124 0x00 0x20 <-- SIXD_SRC shows ZH is 'UP', no IA_BIT expected here

1.4217138 0x00 0x02

1.4217364 0xA8 0xFF Sequential read of 6 data registers

1.4217377 0x00 0x80

1.4217390 0x00 0xFD

1.4217404 0x00 0x70

1.4217417 0x00 0x03

1.4217430 0x00 0xC0

1.4217444 0x00 0x40

Following a short delay, the device was rotated 90-degrees and statusregisters read following an interrupt on INT1 to analyze the cause ofthe interrupt.

Time MOSI MISO Comment

7.7616594 0xB7 0xFF Reg read again starts with STATUS_DUP

7.7616608 0x00 0x41 <-- Temp/Accel data ready

7.7616621 0x00 0x0E <-- Wake-Up sensed; X & Y exceeded thresholds

7.7616634 0x00 0x00

7.7616648 0x00 0x04 <-- SIXD_SRC shows YL is 'UP' but 6D_IA is zero?

7.7616661 0x00 0x02 <-- ALL_INT_SRC shows only the WU_IA; also no 6D_IA

To work around this, I simply keep a copy of the previous SIXD_SRC threshold bits, 3Ah[5:0], and XOR them with the current value of those bits the next time the 6D register is read. If they differ I set 6D_IA in the SPI read buffer and let the original logic handle it from there.