Twait: LSM303CTR Why is there a Twait for IO pins and Vdd?

[TSing.13]

In the datasheet Twait was added to inform us to delay between powering up Vdd_IO and Vdd. However, the Twait timing says that there should be 0-10 mS wait period between Vdd-IO and Vdd. After waiting 0.1 - 100 ms Rise Time for Vdd-IO. What is the Twait time for? What is the danger of powering Vdd-IO and Vdd together?

[Eleon BORLINI]

Hi @TSing.13​ , the Twait has a minimum of 0ms, so no issue if the Vdd_IO and the Vdd are immediately subsequent. Consider btw that Vdd and Vdd_IO are connected to different capacitors value, so the T wait values are suggested to properly handle the different rise times due to the different suggested decoupling capacitors values. Regards