Use LIS3DH on the same SPI bus as an EEPROM, is it possible?

[sima2]

Posted on May 06, 2014 at 17:18

I'm planning to use a LIS3DH on the same SPI bus as an EEPROM.

But in the datasheet it says the LIS3DH CS pin is selecting SPI or I2C.

So is it possible to use SPI to the EEPROM when LIS3DH CS pin is high (the LIS3DH would be in I2C mode)?

I don't think it would be ok, or? 

#cs #spi #lis2dh #lis2hh

[finevlad]

Posted on June 06, 2014 at 22:59

Possible. If you set both devices in spi mode then use spi mode. If you select i2c eeprom use both in i2c mode. Sharing the bus is common practice.

[jansen]

Posted on October 21, 2015 at 16:02

''So is it possible to use SPI to the EEPROM when LIS3DH CS pin is high (the LIS3DH would be in I2C mode)?''

NO, this will likely go badly for you (if it hasn't already).  Several ST devices don't use the notion of Chip Select (CS) in a compatible manor with a shared SPI bus.  When not selected, the CS is HIGH which also puts the device in I2C mode.  Therefore if any data to you EEPROM happens to look like the LIS3DH's I2C slave address, it will drive the SDI line corrupting data to your EEPROM.

I learned this the hardware and can no longer use these ST devices on a shared SPI bus.

[shriharsh]

Posted on February 19, 2016 at 09:36

I agree to the concern that you have raised. Definitely it will fail if the I2C address is matched.

This LIS2HH chipset has CTRL4 register which can enable/disable the I2C module.

So if i pull CS low and write to this CTRL4 to disable the I2C module then will this help avoid I2C working after CS is pulled HIGH?

Can someone please confirm at earliet?

Regards,

Shriharsh Datar

[alexandre239955_stm1]

Posted on February 23, 2016 at 21:12

I'm not sure, but maybe a solution is to drive the Vdd_IO pin low when using the SPI bus to communicate with the EEPROM. It's up to someone from ST to answer if it's reasonable.

Posted on July 06, 2016 at 09:13

I read datasheet for LIS3DH/LIS2DH, but i don't see bit responsible for the work I2C/SPI?

How i can disable I2C module?

P.S.: CTRL_REG4 : BDU | BLE | FS1 | FS0 | HR | ST1 | ST0 | SIM

BDU   - Block data update.

BLE    - Big/little endian data selection.

FS0,1  - Full scale selection.

HR      - High resolution output mode 

ST0,1  - Self test enable.

SIM    - SPI serial interface mode selection. (0: 4-wire interface; 1: 3-wire interface).

[Miroslav BATEK]

Posted on July 08, 2016 at 17:03

To use LIS3DH on shared SPI bus it is necessary to disable the I2C.

It can be done applying following sequence after each device power on.

a = read(0x17)

write(0x17, (0x80 OR a))

Best regards

Miroslav

[Mete C.]

Accessing an undocumented register appears to be a very interesting solution:)

Posted on July 14, 2016 at 16:01

We have a problem with the accelerometer LIS2DH12. You wrote that the installation of the 7th bits to the register 0x17 should disable the I2S module. This is exactly the work in LIS2DH12?

which means that the 1st bit in 0x00 register?

[Miroslav BATEK]

Posted on July 15, 2016 at 09:49

My answer is also valid for LIS2DH12.

Set the 7th bit in register 0x17 to disable I2C.

Best regards

Miroslav

[rainald]

Posted on August 16, 2016 at 15:30

The suggested code is also given as a Note in the Data Sheet (I refer to the IIS328DQ Data Sheet - en.DM00150114.pdf).

However, the last sentence of the Note is misleading and shall be deleted: ''In this way, CTRL_REG4 is programmed to enhance the robustness of the SPI.'' The problem solved with that note has nothing to do with CTRL_REG4.

As multi-slave SPI is common, the Note shall also be moved from the end of the section to the beginning (may be before Table 8. ''Serial interface pin description'').

[Miroslav BATEK]

Posted on August 17, 2016 at 14:41

Thank you for the notice. We are going to update the datasheet asap.

Best regards

Miroslav