What does COUNTER_BDR_REG1?

[gabriel.arnautu]

Hi,

I am using LSM6DSO and I am trying to implement the FIFO feature. I am reading from here (https://www.st.com/content/ccc/resource/technical/document/application_note/group0/56/95/d6/a1/34/4c/49/6d/DM00517282/files/DM00517282.pdf/jcr:content/translations/en.DM00517282.pdf) and I cam up to COUNTER_BDR_REG1 register.

Can someone clarify me what BDR-counter does? I understand that there is a BDU for non-FIFO approach that makes sure the data that I am reading from data output registers are recorded in the same time.

So....what BDR-counter does in relation to FIFO?

Regards,

Gabriel

[Eleon BORLINI]

hi, in LSM6DSO FIFO can be stored up to 512 samples, but there could be other data different from accelerometer and gyro ones. So you could decide to read the FIFO only after it has been filled until a predefined axl or gyro data threshold level (number of samples) is reached. This threshold can be configured in COUNTER_BDR_REG1 and  COUNTER_BDR_REG2, with 1LSB = 1 axl or gyro sample (on 3 axis, select TRIG_ COUNTER _BDR bit to define axl or gyro), and when the FIFO is filled of a number of axl and gyro samples equal to the defined threshold, the COUNTER_BDR_IA bit in FIFO_STATUS2 reg is set to 1.

It is a way to synchronize the number of samples and the FIFO reading/refresh.

[gabriel.arnautu]

What I want to do is to have no threshold and to get the interrupt just when there are 512 values.

What I am doing now are those steps:

1. Disable FIFO in order to clear it
2. disable I3C
3. Enable BDU
4. Set FIFO batch ODR
5. Set data-ready to pulse mode
6. set INT1 to FIFO_FULL
7. Set XL ODR and FS
8. Set FIFO to FIFO mode to start recording.

I am printing the FIFO length in a while and I can see how it increments. The problem is that I get the interrupt when I have 511 values (not 512 as I want) and after this, the registers are returning me 0 when I check the FIFO length. I am not reading anything from FIFO, so it is impossible to be empty.

The problem is, why I get FIFO length equal with 0 after it gives me the FIFO_FULL interrupt and how do I set it to give me an interrupt when it have 512 values, not 511?

[gabriel.arnautu]

The error with not having 512 (just 511) and the one with resetting to 0 without readying from FIFO were because of me not reading the FIFO_STATUS2 correctly.